Hendrik van Rooyen wrote: > It works well - and it is surprisingly fast too... > And its easy if the opcodes are all say one byte, > else you need an opcode length field too, and fancier > parsing.
Often (always?) RISC architectures' instruction+operand lengths are fixed to the word size of the machine. E.g. the MIPS 3000 and 4000 were 32 bits for every instruction, and PC was always a multiple of four. ...which means the parsing is pretty straight forward, but as you say, simulating the rest of the machine is the hard part. -tom! -- -- http://mail.python.org/mailman/listinfo/python-list
