On 11/6/23 10:50, Alex Bennée wrote:
This is a slightly hacky way to avoid duplicate PAR's in the system register XML we send to gdb which causes an alias. However the other alternative would be to post process ARMCPRegInfo once all registers have been defined looking for textual duplicates. And that seems like overkill.Signed-off-by: Alex Bennée <alex.ben...@linaro.org> Message-Id: <20231103195956.1998255-4-alex.ben...@linaro.org> --- target/arm/helper.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/arm/helper.c b/target/arm/helper.c index 5dc0d20a84..104f9378b4 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -3727,7 +3727,7 @@ static const ARMCPRegInfo vapa_cp_reginfo[] = { .access = PL1_RW, .resetvalue = 0, .bank_fieldoffsets = { offsetoflow32(CPUARMState, cp15.par_s), offsetoflow32(CPUARMState, cp15.par_ns) }, - .writefn = par_write }, + .writefn = par_write, .type = ARM_CP_NO_GDB }, #ifndef CONFIG_USER_ONLY /* This underdecoding is safe because the reginfo is NO_RAW. */ { .name = "ATS", .cp = 15, .crn = 7, .crm = 8, .opc1 = 0, .opc2 = CP_ANY,
If the implementation includes LPAE, this is an alias of the full 64-bit register (the "other PAR", and so type should contain ARM_CP_ALIAS.
If the implementation does not include LPAE, this should not be ARM_CP_NO_GDB because there is no 64-bit alternate.
r~
