On 1/20/24 00:40, Anton Johansson wrote:
Uses target_has_precise_smc() and target_phys_addr_space_bits() to turn
ifdefs into runtime branches.
Signed-off-by: Anton Johansson <a...@rev.ng>
---
accel/tcg/tb-maint.c | 47 +++++++++++++++++++++++---------------------
1 file changed, 25 insertions(+), 22 deletions(-)
diff --git a/accel/tcg/tb-maint.c b/accel/tcg/tb-maint.c
index b194f8f065..fdc3a30d0d 100644
--- a/accel/tcg/tb-maint.c
+++ b/accel/tcg/tb-maint.c
@@ -148,14 +148,6 @@ static PageForEachNext foreach_tb_next(PageForEachNext tb,
}
#else
-/*
- * In system mode we want L1_MAP to be based on ram offsets.
- */
-#if HOST_LONG_BITS < TARGET_PHYS_ADDR_SPACE_BITS
-# define L1_MAP_ADDR_SPACE_BITS HOST_LONG_BITS
-#else
-# define L1_MAP_ADDR_SPACE_BITS TARGET_PHYS_ADDR_SPACE_BITS
-#endif
I'm not keen on this. We can make this target independent in several ways:
(1) Use fixed constants that cover all 64 phys addr bits,
(2) Use a different data structure entirely (e.g. IntervalTree).
Preserving the existing data structure, using variables, seems like a poor
choice.
@@ -1045,14 +1048,15 @@ bool tb_invalidate_phys_page_unwind(tb_page_addr_t
addr, uintptr_t pc)
TranslationBlock *tb;
PageForEachNext n;
tb_page_addr_t last;
+ const bool has_precise_smc = target_has_precise_smc();
/*
* Without precise smc semantics, or when outside of a TB,
* we can skip to invalidate.
*/
-#ifndef TARGET_HAS_PRECISE_SMC
- pc = 0;
-#endif
+ if (!has_precise_smc) {
+ pc = 0;
+ }
Ok to this part. Split it out.
r~
