Re: [PATCH v5 02/12] tcg/riscv: Add basic support for vector

[Richard Henderson]

On 10/6/24 19:56, LIU Zhiwei wrote:

@@ -2100,6 +2136,30 @@ static void tcg_target_init(TCGContext *s)
  {
      tcg_target_available_regs[TCG_TYPE_I32] = 0xffffffff;
      tcg_target_available_regs[TCG_TYPE_I64] = 0xffffffff;
+    s->reserved_regs = 0;
+
+    switch (riscv_lg2_vlenb) {
+    case TCG_TYPE_V64:
+        tcg_target_available_regs[TCG_TYPE_V64] = ALL_VECTOR_REGS;
+        tcg_target_available_regs[TCG_TYPE_V128] = ALL_DVECTOR_REG_GROUPS;
+        tcg_target_available_regs[TCG_TYPE_V256] = ALL_QVECTOR_REG_GROUPS;
+        s->reserved_regs |= (~ALL_QVECTOR_REG_GROUPS & ALL_VECTOR_REGS);
+        break;
+    case TCG_TYPE_V128:
+        tcg_target_available_regs[TCG_TYPE_V64] = ALL_VECTOR_REGS;
+        tcg_target_available_regs[TCG_TYPE_V128] = ALL_VECTOR_REGS;
+        tcg_target_available_regs[TCG_TYPE_V256] = ALL_DVECTOR_REG_GROUPS;
+        s->reserved_regs |= (~ALL_DVECTOR_REG_GROUPS & ALL_VECTOR_REGS);
+        break;
+    default:
+        /* Guaranteed by Zve64x. */
+        tcg_debug_assert(riscv_lg2_vlenb >= TCG_TYPE_V256);
+
+        tcg_target_available_regs[TCG_TYPE_V64] = ALL_VECTOR_REGS;
+        tcg_target_available_regs[TCG_TYPE_V128] = ALL_VECTOR_REGS;
+        tcg_target_available_regs[TCG_TYPE_V256] = ALL_VECTOR_REGS;
+        break;
+    }

Missing a check for host vector support.


r~