On Wed, Apr 18, 2012 at 01:28, Xin Tong <xerox.time.t...@gmail.com> wrote: > I am reading how qemu refill TLB working. > > target-i386/helper.c > > pte = pte & env->a20_mask; > > /* Even if 4MB pages, we map only one 4KB page in the cache to > avoid filling it too fast */ > page_offset = (addr & TARGET_PAGE_MASK) & (page_size - 1); > paddr = (pte & TARGET_PAGE_MASK) + page_offset; > vaddr = virt_addr + page_offset; > > > How can the paddr be bigger than 4G even though i gave the machine > 4096 MB of memory ( i.e. qemu -m 4096 ...). should not paddr be within > 0 - 4G-1 ?
No. There's PAE and the same code is used by both i386 and x86_64. > > Thanks > > Xin >