Hi Jason,

Patch LGTM but it won't apply on top of alistair/riscv-to-apply.next. Can
you please rebase?


Thanks,

Daniel

On 2/27/25 4:34 AM, Jason Chien wrote:
The PPN field in a non-leaf PDT entry is positioned differently from that
in a leaf PDT entry. The original implementation incorrectly used the leaf
entry's PPN mask to extract the PPN from a non-leaf entry, leading to an
erroneous page table walk.

This commit introduces new macros to properly define the fields for
non-leaf PDT entries and corrects the page table walk.

Signed-off-by: Jason Chien <jason.ch...@sifive.com>
---
  hw/riscv/riscv-iommu-bits.h | 6 +++++-
  hw/riscv/riscv-iommu.c      | 4 ++--
  2 files changed, 7 insertions(+), 3 deletions(-)

diff --git a/hw/riscv/riscv-iommu-bits.h b/hw/riscv/riscv-iommu-bits.h
index de599b80d6..8d621c5b70 100644
--- a/hw/riscv/riscv-iommu-bits.h
+++ b/hw/riscv/riscv-iommu-bits.h
@@ -368,12 +368,16 @@ enum riscv_iommu_fq_causes {
  #define RISCV_IOMMU_DC_MSIPTP_MODE_OFF  0
  #define RISCV_IOMMU_DC_MSIPTP_MODE_FLAT 1
+/* 2.2 Process Directory Table */
+#define RISCV_IOMMU_PDTE_VALID          BIT_ULL(0)
+#define RISCV_IOMMU_PDTE_PPN            RISCV_IOMMU_PPN_FIELD
+
  /* Translation attributes fields */
  #define RISCV_IOMMU_PC_TA_V             BIT_ULL(0)
  #define RISCV_IOMMU_PC_TA_RESERVED      GENMASK_ULL(63, 32)
/* First stage context fields */
-#define RISCV_IOMMU_PC_FSC_PPN          GENMASK_ULL(43, 0)
+#define RISCV_IOMMU_PC_FSC_PPN          RISCV_IOMMU_ATP_PPN_FIELD
  #define RISCV_IOMMU_PC_FSC_RESERVED     GENMASK_ULL(59, 44)
enum riscv_iommu_fq_ttypes {
diff --git a/hw/riscv/riscv-iommu.c b/hw/riscv/riscv-iommu.c
index e7568ca227..1abe981244 100644
--- a/hw/riscv/riscv-iommu.c
+++ b/hw/riscv/riscv-iommu.c
@@ -1043,10 +1043,10 @@ static int riscv_iommu_ctx_fetch(RISCVIOMMUState *s, 
RISCVIOMMUContext *ctx)
              return RISCV_IOMMU_FQ_CAUSE_PDT_LOAD_FAULT;
          }
          le64_to_cpus(&de);
-        if (!(de & RISCV_IOMMU_PC_TA_V)) {
+        if (!(de & RISCV_IOMMU_PDTE_VALID)) {
              return RISCV_IOMMU_FQ_CAUSE_PDT_INVALID;
          }
-        addr = PPN_PHYS(get_field(de, RISCV_IOMMU_PC_FSC_PPN));
+        addr = PPN_PHYS(get_field(de, RISCV_IOMMU_PDTE_PPN));
      }
/* Leaf entry in PDT */


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