Reviewed-by: Philippe Mathieu-Daudé <phi...@linaro.org>
Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
---
include/tcg/tcg-opc.h | 3 +--
tcg/optimize.c | 7 +++----
tcg/tcg-op.c | 8 ++++----
tcg/tcg.c | 9 +++------
tcg/tci.c | 5 ++---
docs/devel/tcg-ops.rst | 2 +-
tcg/tci/tcg-target.c.inc | 2 +-
7 files changed, 15 insertions(+), 21 deletions(-)
diff --git a/include/tcg/tcg-opc.h b/include/tcg/tcg-opc.h
index 5e085607d5..acfbaa05b4 100644
--- a/include/tcg/tcg-opc.h
+++ b/include/tcg/tcg-opc.h
@@ -43,6 +43,7 @@ DEF(mov, 1, 1, 0, TCG_OPF_INT | TCG_OPF_NOT_PRESENT)
DEF(add, 1, 2, 0, TCG_OPF_INT)
DEF(and, 1, 2, 0, TCG_OPF_INT)
DEF(andc, 1, 2, 0, TCG_OPF_INT)
+DEF(bswap16, 1, 1, 1, TCG_OPF_INT)
DEF(clz, 1, 2, 0, TCG_OPF_INT)
DEF(ctpop, 1, 1, 0, TCG_OPF_INT)
DEF(ctz, 1, 2, 0, TCG_OPF_INT)
@@ -95,7 +96,6 @@ DEF(sub2_i32, 2, 4, 0, 0)
DEF(brcond2_i32, 0, 4, 2, TCG_OPF_BB_END | TCG_OPF_COND_BRANCH)
DEF(setcond2_i32, 1, 4, 1, 0)
-DEF(bswap16_i32, 1, 1, 1, 0)
DEF(bswap32_i32, 1, 1, 1, 0)
/* load/store */
@@ -122,7 +122,6 @@ DEF(extu_i32_i64, 1, 1, 0, 0)
DEF(extrl_i64_i32, 1, 1, 0, 0)
DEF(extrh_i64_i32, 1, 1, 0, 0)
-DEF(bswap16_i64, 1, 1, 1, 0)
DEF(bswap32_i64, 1, 1, 1, 0)
DEF(bswap64_i64, 1, 1, 1, 0)
diff --git a/tcg/optimize.c b/tcg/optimize.c
index 8783447e29..75849a1495 100644
--- a/tcg/optimize.c
+++ b/tcg/optimize.c
@@ -506,7 +506,7 @@ static uint64_t do_constant_folding_2(TCGOpcode op, TCGType
type,
case INDEX_op_ctpop:
return type == TCG_TYPE_I32 ? ctpop32(x) : ctpop64(x);
- CASE_OP_32_64(bswap16):
+ case INDEX_op_bswap16:
x = bswap16(x);
return y & TCG_BSWAP_OS ? (int16_t)x : x;
@@ -1560,8 +1560,7 @@ static bool fold_bswap(OptContext *ctx, TCGOp *op)
z_mask = t1->z_mask;
switch (op->opc) {
- case INDEX_op_bswap16_i32:
- case INDEX_op_bswap16_i64:
+ case INDEX_op_bswap16:
z_mask = bswap16(z_mask);
sign = INT16_MIN;
break;
@@ -2858,7 +2857,7 @@ void tcg_optimize(TCGContext *s)
case INDEX_op_brcond2_i32:
done = fold_brcond2(&ctx, op);
break;
- CASE_OP_32_64(bswap16):
+ case INDEX_op_bswap16:
CASE_OP_32_64(bswap32):
case INDEX_op_bswap64_i64:
done = fold_bswap(&ctx, op);
diff --git a/tcg/tcg-op.c b/tcg/tcg-op.c
index c5b3bc8148..917f52b04a 100644
--- a/tcg/tcg-op.c
+++ b/tcg/tcg-op.c
@@ -1257,8 +1257,8 @@ void tcg_gen_bswap16_i32(TCGv_i32 ret, TCGv_i32 arg, int
flags)
/* Only one extension flag may be present. */
tcg_debug_assert(!(flags & TCG_BSWAP_OS) || !(flags & TCG_BSWAP_OZ));
- if (tcg_op_supported(INDEX_op_bswap16_i32, TCG_TYPE_I32, 0)) {
- tcg_gen_op3i_i32(INDEX_op_bswap16_i32, ret, arg, flags);
+ if (tcg_op_supported(INDEX_op_bswap16, TCG_TYPE_I32, 0)) {
+ tcg_gen_op3i_i32(INDEX_op_bswap16, ret, arg, flags);
} else {
TCGv_i32 t0 = tcg_temp_ebb_new_i32();
TCGv_i32 t1 = tcg_temp_ebb_new_i32();
@@ -2087,8 +2087,8 @@ void tcg_gen_bswap16_i64(TCGv_i64 ret, TCGv_i64 arg, int
flags)
} else {
tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
}
- } else if (tcg_op_supported(INDEX_op_bswap16_i64, TCG_TYPE_I64, 0)) {
- tcg_gen_op3i_i64(INDEX_op_bswap16_i64, ret, arg, flags);
+ } else if (tcg_op_supported(INDEX_op_bswap16, TCG_TYPE_I64, 0)) {
+ tcg_gen_op3i_i64(INDEX_op_bswap16, ret, arg, flags);
} else {
TCGv_i64 t0 = tcg_temp_ebb_new_i64();
TCGv_i64 t1 = tcg_temp_ebb_new_i64();
diff --git a/tcg/tcg.c b/tcg/tcg.c
index a6af923450..2337a3c247 100644
--- a/tcg/tcg.c
+++ b/tcg/tcg.c
@@ -1075,8 +1075,7 @@ static const TCGOutOp * const all_outop[NB_OPS] = {
OUTOP(INDEX_op_and, TCGOutOpBinary, outop_and),
OUTOP(INDEX_op_andc, TCGOutOpBinary, outop_andc),
OUTOP(INDEX_op_brcond, TCGOutOpBrcond, outop_brcond),
- OUTOP(INDEX_op_bswap16_i32, TCGOutOpBswap, outop_bswap16),
- OUTOP(INDEX_op_bswap16_i64, TCGOutOpBswap, outop_bswap16),
+ OUTOP(INDEX_op_bswap16, TCGOutOpBswap, outop_bswap16),
OUTOP(INDEX_op_clz, TCGOutOpBinary, outop_clz),
OUTOP(INDEX_op_ctpop, TCGOutOpUnary, outop_ctpop),
OUTOP(INDEX_op_ctz, TCGOutOpBinary, outop_ctz),
@@ -2941,8 +2940,7 @@ void tcg_dump_ops(TCGContext *s, FILE *f, bool have_prefs)
i = 1;
}
break;
- case INDEX_op_bswap16_i32:
- case INDEX_op_bswap16_i64:
+ case INDEX_op_bswap16:
case INDEX_op_bswap32_i32:
case INDEX_op_bswap32_i64:
case INDEX_op_bswap64_i64:
@@ -5486,8 +5484,7 @@ static void tcg_reg_alloc_op(TCGContext *s, const TCGOp
*op)
}
break;
- case INDEX_op_bswap16_i32:
- case INDEX_op_bswap16_i64:
+ case INDEX_op_bswap16:
{
const TCGOutOpBswap *out =
container_of(all_outop[op->opc], TCGOutOpBswap, base);
diff --git a/tcg/tci.c b/tcg/tci.c
index ae447e91bd..905ca154fc 100644
--- a/tcg/tci.c
+++ b/tcg/tci.c
@@ -686,7 +686,7 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState
*env,
tci_write_reg64(regs, r1, r0, T1 - T2);
break;
#endif
- CASE_32_64(bswap16)
+ case INDEX_op_bswap16:
tci_args_rr(insn, &r0, &r1);
regs[r0] = bswap16(regs[r1]);
break;
@@ -1005,14 +1005,13 @@ int print_insn_tci(bfd_vma addr, disassemble_info *info)
op_name, str_r(r0), str_r(r1), s2);
break;
+ case INDEX_op_bswap16:
case INDEX_op_ctpop:
case INDEX_op_mov:
case INDEX_op_neg:
case INDEX_op_not:
case INDEX_op_ext_i32_i64:
case INDEX_op_extu_i32_i64:
- case INDEX_op_bswap16_i32:
- case INDEX_op_bswap16_i64:
case INDEX_op_bswap32_i32:
case INDEX_op_bswap32_i64:
case INDEX_op_bswap64_i64:
diff --git a/docs/devel/tcg-ops.rst b/docs/devel/tcg-ops.rst
index 26dc3bad49..509cfe7db1 100644
--- a/docs/devel/tcg-ops.rst
+++ b/docs/devel/tcg-ops.rst
@@ -415,7 +415,7 @@ Misc
- | *t0* = *t1*
| Move *t1* to *t0*.
- * - bswap16_i32/i64 *t0*, *t1*, *flags*
+ * - bswap16 *t0*, *t1*, *flags*
- | 16 bit byte swap on the low bits of a 32/64 bit input.
|
diff --git a/tcg/tci/tcg-target.c.inc b/tcg/tci/tcg-target.c.inc
index 2a8ba07e37..4d3d9569cc 100644
--- a/tcg/tci/tcg-target.c.inc
+++ b/tcg/tci/tcg-target.c.inc
@@ -905,7 +905,7 @@ static const TCGOutOpUnary outop_ctpop = {
static void tgen_bswap16(TCGContext *s, TCGType type,
TCGReg a0, TCGReg a1, unsigned flags)
{
- tcg_out_op_rr(s, INDEX_op_bswap16_i32, a0, a1);
+ tcg_out_op_rr(s, INDEX_op_bswap16, a0, a1);
if (flags & TCG_BSWAP_OS) {
tcg_out_sextract(s, TCG_TYPE_REG, a0, a0, 0, 16);
}
