On 5/7/25 09:38, FOSS wrote:
Thank you for working on a fix for this! Should we include our functional test as a patch to test for this in the future or do anything else to help with this?

The test didn't work for me.  It's probably better to write a stand-alone test 
case.


r~


-Percival Engineering
------------------------------------------------------------------------------------------
*From:* Richard Henderson <richard.hender...@linaro.org>
*Sent:* Sunday, May 4, 2025 8:57 PM
*To:* qemu-devel@nongnu.org <qemu-devel@nongnu.org>
*Cc:* FOSS <f...@percivaleng.com>
*Subject:* [PATCH 00/12] accel/tcg: Fix cross-page pointer wrapping issue
[You don't often get email from richard.hender...@linaro.org. Learn why this is important at https://aka.ms/LearnAboutSenderIdentification <https://aka.ms/ LearnAboutSenderIdentification> ]

As detailed in

https://usg02.safelinks.protection.office365.us/?url=https%3A%2F%2Flore.kernel.org%2Fqemu- devel%2F174595764300.3422.13156465553505851834-0%40git.sr.ht%2F&data=05%7C02%7Cfoss%40percivaleng.com%7Cbcd8ed34f3e342df86f008dd8b4e40b7%7C7e469936b9c44e65a905faf8e5ffac80%7C0%7C0%7C638819890414363571%7CUnknown%7CTWFpbGZsb3d8eyJFbXB0eU1hcGkiOnRydWUsIlYiOiIwLjAuMDAwMCIsIlAiOiJXaW4zMiIsIkFOIjoiTWFpbCIsIldUIjoyfQ%3D%3D%7C0%7C%7C%7C&sdata=i%2FTD9xTTxa4eRseMhadW%2FLw3hPMDp2sPDJF%2BzIzjfJw%3D&reserved=0 <https://lore.kernel.org/qemu-devel/174595764300.3422.1315646555350585183...@git.sr.ht/>

there's an issue with an unaligned access that falls off
the end of the last page.  To solve this, we need to know
about the state of the cpu, so add a new target hook.

There are arguments to the hook that are currently unused,
but would appear to come in handy for AArch64 v9.5 FEAT_CPA2,
which we do not yet implement.


r~


Richard Henderson (12):
   accel/tcg: Add TCGCPUOps.pointer_wrap
   target: Use cpu_pointer_wrap_notreached for strict align targets
   target: Use cpu_pointer_wrap_uint32 for 32-bit targets
   target/arm: Fill in TCGCPUOps.pointer_wrap
   target/i386: Fill in TCGCPUOps.pointer_wrap
   target/loongarch: Fill in TCGCPUOps.pointer_wrap
   target/mips: Fill in TCGCPUOps.pointer_wrap
   target/ppc: Fill in TCGCPUOps.pointer_wrap
   target/riscv: Fill in TCGCPUOps.pointer_wrap
   target/s390x: Fill in TCGCPUOps.pointer_wrap
   target/sparc: Fill in TCGCPUOps.pointer_wrap
   accel/tcg: Assert TCGCPUOps.pointer_wrap is set

  include/accel/tcg/cpu-ops.h | 13 +++++++++++++
  accel/tcg/cpu-exec.c        |  1 +
  accel/tcg/cputlb.c          | 22 ++++++++++++++++++++++
  target/alpha/cpu.c          |  1 +
  target/arm/cpu.c            | 24 ++++++++++++++++++++++++
  target/arm/tcg/cpu-v7m.c    |  1 +
  target/avr/cpu.c            |  6 ++++++
  target/hppa/cpu.c           |  1 +
  target/i386/tcg/tcg-cpu.c   |  7 +++++++
  target/loongarch/cpu.c      |  7 +++++++
  target/m68k/cpu.c           |  1 +
  target/microblaze/cpu.c     |  1 +
  target/mips/cpu.c           |  9 +++++++++
  target/openrisc/cpu.c       |  1 +
  target/ppc/cpu_init.c       |  7 +++++++
  target/riscv/tcg/tcg-cpu.c  | 26 ++++++++++++++++++++++++++
  target/rx/cpu.c             |  1 +
  target/s390x/cpu.c          |  9 +++++++++
  target/sh4/cpu.c            |  1 +
  target/sparc/cpu.c          | 13 +++++++++++++
  target/tricore/cpu.c        |  1 +
  target/xtensa/cpu.c         |  1 +
  22 files changed, 154 insertions(+)

--
2.43.0

This electronic message and any files transmitted with it contain confidential and proprietary information, and is intended for use only by the person(s) to whom it is addressed. Any use, distribution, copying or disclosure to any other person is strictly prohibited. If you have received this message in error, please notify the e-mail sender immediately, and delete the original message without making a copy.



Reply via email to