On 5/11/2025 10:10 PM, Nicholas Piggin wrote:
Add some assertions to try to ensure presented group interrupts do
not get lost without being redistributed, if they become precluded
by CPPR or preempted by a higher priority interrupt.
Reviewed-by: Michael Kowal<ko...@linux.ibm.com>
Thanks, MAK
Signed-off-by: Nicholas Piggin <npig...@gmail.com>
---
hw/intc/xive.c | 2 ++
hw/intc/xive2.c | 1 +
2 files changed, 3 insertions(+)
diff --git a/hw/intc/xive.c b/hw/intc/xive.c
index 4659821d4a..81af59f0ec 100644
--- a/hw/intc/xive.c
+++ b/hw/intc/xive.c
@@ -132,6 +132,8 @@ void xive_tctx_pipr_set(XiveTCTX *tctx, uint8_t ring,
uint8_t pipr,
uint8_t *sig_regs = xive_tctx_signal_regs(tctx, ring);
uint8_t *regs = &tctx->regs[ring];
+ g_assert(!xive_nsr_indicates_group_exception(ring, sig_regs[TM_NSR]));
+
sig_regs[TM_PIPR] = pipr;
if (pipr < sig_regs[TM_CPPR]) {
diff --git a/hw/intc/xive2.c b/hw/intc/xive2.c
index ace5871706..e3060810d3 100644
--- a/hw/intc/xive2.c
+++ b/hw/intc/xive2.c
@@ -1089,6 +1089,7 @@ static void xive2_tctx_process_pending(XiveTCTX *tctx,
uint8_t sig_ring)
int rc;
g_assert(sig_ring == TM_QW3_HV_PHYS || sig_ring == TM_QW1_OS);
+ g_assert(!xive_nsr_indicates_group_exception(sig_ring, sig_regs[TM_NSR]));
/*
* Recompute the PIPR based on local pending interrupts. It will
