On Sat, 31 May 2025 at 13:11, Akihiko Odaki
<od...@rsg.ci.i.u-tokyo.ac.jp> wrote:
>
> Raw writes to PMCNTENCLR and PMCNTENCLR_EL0 incorrectly used their
> default write function, which clears written bits instead of writes the
> raw value.
>
> PMINTENCLR and PMINTENCLR_EL1 are similar registers, but they instead
> had ARM_CP_NO_RAW. Commit 7a0e58fa6487 ("target-arm: Split NO_MIGRATE
> into ALIAS and NO_RAW") sugguests ARM_CP_ALIAS should be used instead of
> ARM_CP_NO_RAW in such a case:
>
> > We currently mark ARM coprocessor/system register definitions with
> > the flag ARM_CP_NO_MIGRATE for two different reasons:
> > 1) register is an alias on to state that's also visible via
> >    some other register, and that other register is the one
> >    responsible for migrating the state
> > 2) register is not actually state at all (for instance the TLB
> >    or cache maintenance operation "registers") and it makes no
> >    sense to attempt to migrate it or otherwise access the raw state
> >
> > This works fine for identifying which registers should be ignored
> > when performing migration, but we also use the same functions for
> > synchronizing system register state between QEMU and the kernel
> > when using KVM. In this case we don't want to try to sync state
> > into registers in category 2, but we do want to sync into registers
> > in category 1, because the kernel might have picked a different
> > one of the aliases as its choice for which one to expose for
> > migration.
>
> These registers fall in category 1 (ARM_CP_ALIAS), not category 2
> (ARM_CP_NO_RAW).
>
> ARM_CP_NO_RAW also has another undesired side effect that hides
> registers from GDB.
>
> Properly set raw write functions and drop the ARM_CP_NO_RAW flag from
> PMINTENCLR and PMINTENCLR_EL1; this fixes GDB/KVM state synchronization
> of PMCNTENCLR and PMCNTENCLR_EL0, and exposes all these four registers
> to GDB.
>
> It is not necessary to add ARM_CP_ALIAS to these registers because the
> flag is already set.
>
> Signed-off-by: Akihiko Odaki <od...@rsg.ci.i.u-tokyo.ac.jp>



Applied to target-arm.next, thanks.

-- PMM

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