On Fri, Apr 25, 2025 at 10:18 PM Ran Wang <wang...@bosc.ac.cn> wrote: > > This serial adds Xiangshan Kunminghu CPU and its FPGA prototype > platform, which include UART, CLINT, IMSIC, and APLIC > devices. > > More details can be found at > https://github.com/OpenXiangShan/XiangShan > > Patches based on alistair/riscv-to-apply.next > > Huang Borong (2): > target/riscv: Add BOSC's Xiangshan Kunminghu CPU > hw/riscv: Initial support for BOSC's Xiangshan Kunminghu FPGA > prototype
Thanks! Applied to riscv-to-apply.next Alistair > > MAINTAINERS | 7 + > configs/devices/riscv64-softmmu/default.mak | 1 + > docs/system/riscv/xiangshan-kunminghu.rst | 39 ++++ > docs/system/target-riscv.rst | 1 + > hw/riscv/Kconfig | 9 + > hw/riscv/meson.build | 1 + > hw/riscv/xiangshan_kmh.c | 220 ++++++++++++++++++++ > include/hw/riscv/xiangshan_kmh.h | 78 +++++++ > target/riscv/cpu-qom.h | 1 + > target/riscv/cpu.c | 64 ++++++ > 10 files changed, 421 insertions(+) > create mode 100644 docs/system/riscv/xiangshan-kunminghu.rst > create mode 100644 hw/riscv/xiangshan_kmh.c > create mode 100644 include/hw/riscv/xiangshan_kmh.h > > -- > 2.34.1 >
