On Thu, 19 Jun 2025 10:30:28 +0100 Jonathan Cameron <jonathan.came...@huawei.com> wrote:
> On Thu, 19 Jun 2025 09:05:07 +0100 > Shameerali Kolothum Thodi <shameerali.kolothum.th...@huawei.com> wrote: > > > > -----Original Message----- > > > From: Eric Auger <eric.au...@redhat.com> > > > Sent: Thursday, June 19, 2025 8:41 AM > > > To: Shameerali Kolothum Thodi > > > <shameerali.kolothum.th...@huawei.com>; Jonathan Cameron > > > <jonathan.came...@huawei.com> > > > Cc: Linuxarm <linux...@huawei.com>; qemu-...@nongnu.org; qemu- > > > de...@nongnu.org; peter.mayd...@linaro.org; j...@nvidia.com; > > > nicol...@nvidia.com; ddut...@redhat.com; berra...@redhat.com; > > > imamm...@redhat.com; nath...@nvidia.com; mo...@nvidia.com; > > > smost...@google.com; Wangzhou (B) <wangzh...@hisilicon.com>; > > > jiangkunkun <jiangkun...@huawei.com>; zhangfei....@linaro.org > > > Subject: Re: [PATCH v4 1/7] hw/arm/smmu-common: Check SMMU has PCIe > > > Root Complex association > > > > > > Hi Shameer, > > > > > > On 6/19/25 9:24 AM, Shameerali Kolothum Thodi wrote: > > > > Hi Eric, > > > > > > > >> -----Original Message----- > > > >> From: Eric Auger <eric.au...@redhat.com> > > > >> Sent: Wednesday, June 18, 2025 6:00 PM > > > >> To: Shameerali Kolothum Thodi > > > >> <shameerali.kolothum.th...@huawei.com>; Jonathan Cameron > > > >> <jonathan.came...@huawei.com> > > > >> Cc: Linuxarm <linux...@huawei.com>; qemu-...@nongnu.org; qemu- > > > >> de...@nongnu.org; peter.mayd...@linaro.org; j...@nvidia.com; > > > >> nicol...@nvidia.com; ddut...@redhat.com; berra...@redhat.com; > > > >> imamm...@redhat.com; nath...@nvidia.com; mo...@nvidia.com; > > > >> smost...@google.com; Wangzhou (B) <wangzh...@hisilicon.com>; > > > >> jiangkunkun <jiangkun...@huawei.com>; zhangfei....@linaro.org > > > >> Subject: Re: [PATCH v4 1/7] hw/arm/smmu-common: Check SMMU has > > > PCIe > > > >> Root Complex association > > > >> > > > >> Hi Shameer, Jonathan, > > > >> > > > >> On 6/18/25 10:35 AM, Shameerali Kolothum Thodi wrote: > > > >>>> -----Original Message----- > > > >>>> From: Jonathan Cameron <jonathan.came...@huawei.com> > > > >>>> Sent: Tuesday, June 17, 2025 5:53 PM > > > >>>> To: Eric Auger <eric.au...@redhat.com> > > > >>>> Cc: Shameerali Kolothum Thodi > > > >>>> <shameerali.kolothum.th...@huawei.com>; Linuxarm > > > >>>> <linux...@huawei.com>; qemu-...@nongnu.org; qemu- > > > >>>> de...@nongnu.org; peter.mayd...@linaro.org; j...@nvidia.com; > > > >>>> nicol...@nvidia.com; ddut...@redhat.com; berra...@redhat.com; > > > >>>> imamm...@redhat.com; nath...@nvidia.com; mo...@nvidia.com; > > > >>>> smost...@google.com; Wangzhou (B) <wangzh...@hisilicon.com>; > > > >>>> jiangkunkun <jiangkun...@huawei.com>; zhangfei....@linaro.org > > > >>>> Subject: Re: [PATCH v4 1/7] hw/arm/smmu-common: Check SMMU has > > > >> PCIe > > > >>>> Root Complex association > > > >>>> > > > >>>> On Tue, 17 Jun 2025 09:49:54 +0200 > > > >>>> Eric Auger <eric.au...@redhat.com> wrote: > > > >>>> > > > >>>>> On 6/16/25 12:20 PM, Jonathan Cameron wrote: > > > >>>>>> On Fri, 13 Jun 2025 15:44:43 +0100 > > > >>>>>> Shameer Kolothum <shameerali.kolothum.th...@huawei.com> > > > wrote: > > > >>>>>> > > > >>>>>>> Although this change does not affect functionality at present, it > > > >>>>>>> is > > > >>>>>> Patch title says PCIe. This check is vs PCI host bridge. > > > >>>>>> > > > >>>>>> No idea which one you wanted, but if it is PCIe needs to be > > > >>>>>> TYPC_PCIE_HOST_BRIDGE from pcie_host.h not the pci_host.h one > > > >>>>>> I think. > > > >>>>> I think we need TYPE_PCI_HOST_BRIDGE as we want to check against > > > >> pxb > > > >>>>> pci-bridge/pci_expander_bridge.c: .parent = > > > >>>> TYPE_PCI_HOST_BRIDGE, > > > >> sorry but I still fail to understand why we can't just check against > > > >> > > > >> TYPE_PCI_HOST_BRIDGE for making sure the SMMU is attached to PXB or > > > >> GPEX. What does it fail to check? Why shall we care about PCI vs PCIe? > > > >> > > > > I think the concern is getting any other TYPE_PCI_HOST_BRIDGE types > > > attached > > > > to SMMUv3 other than pxb-pcie or GPEX. For example you could do, > > > > > > > > -device pxb-cxl,bus_nr=12,bus=pcie.0,id=cxl.1 \ > > > > -device arm-smmuv3,primary-bus=cxl.1,id=smmuv3.1 \ > > > > > > > > as pxb-cxl is of type TYPE_PCI_HOST_BRIDGE. I don't know if there are > > > > any > > > other > > > > ones similar to this out there. > > > > > > > > So the aim is to make the checking more specific to PXB. > > > > > > thank you for the clarification. Is it invalid to have the SMMU > > > protecting RIDs comming from the pxb-cxl hierarchy? > > > > That’s a good question. I don't know that for sure. > > It should be fine to support CXL for this but we can work that out later. > > For now limited use cases as there is no CXL VFIO support and the only thing > emulated devices do that the SMMU might influence is MSIX. > > The one that concerned me is pxb-pci if we only care about pcie. > I'm not sure if we need to make that distinction or not. > Hmm. Shameer pointed out I hallucinated the existence of a PCI only expander bridge. So ignore that. > Jonathan > > > Anyway currently the full support for CXL on virt is in progress here, > > https://lore.kernel.org/qemu-devel/20250612134338.1871023-1-jonathan.came...@huawei.com/ > > > > Jonathan? > > > > Thanks, > > Shameer > > > > > > > >
