On Wed, 2 Jul 2025 at 13:38, Richard Henderson
<richard.hender...@linaro.org> wrote:
>
> These instructions are present in both SME(1) and SVE2.1 extensions.
>
> Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
> ---
> target/arm/tcg/translate-sve.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/target/arm/tcg/translate-sve.c b/target/arm/tcg/translate-sve.c
> index ac4dc7db46..ff70bf27b0 100644
> --- a/target/arm/tcg/translate-sve.c
> +++ b/target/arm/tcg/translate-sve.c
> @@ -7375,7 +7375,7 @@ static void gen_sclamp(unsigned vece, uint32_t d,
> uint32_t n, uint32_t m,
> tcg_gen_gvec_4(d, n, m, a, oprsz, maxsz, &ops[vece]);
> }
>
> -TRANS_FEAT(SCLAMP, aa64_sme, gen_gvec_fn_arg_zzzz, gen_sclamp, a)
> +TRANS_FEAT(SCLAMP, aa64_sme_or_sve2p1, gen_gvec_fn_arg_zzzz, gen_sclamp, a)
>
> static void gen_uclamp_i32(TCGv_i32 d, TCGv_i32 n, TCGv_i32 m, TCGv_i32 a)
> {
> @@ -7426,7 +7426,7 @@ static void gen_uclamp(unsigned vece, uint32_t d,
> uint32_t n, uint32_t m,
> tcg_gen_gvec_4(d, n, m, a, oprsz, maxsz, &ops[vece]);
> }
>
> -TRANS_FEAT(UCLAMP, aa64_sme, gen_gvec_fn_arg_zzzz, gen_uclamp, a)
> +TRANS_FEAT(UCLAMP, aa64_sme_or_sve2p1, gen_gvec_fn_arg_zzzz, gen_uclamp, a)
>
> TRANS_FEAT(SQCVTN_sh, aa64_sme2_or_sve2p1, gen_gvec_ool_zz,
> gen_helper_sme2_sqcvtn_sh, a->rd, a->rn, 0)
> --
Reviewed-by: Peter Maydell <peter.mayd...@linaro.org>
thanks
-- PMM
