On Wed, Jul 16, 2025 at 11:54:10AM +0200, Luc Michel wrote:
> Refactor the OCM creation using the VersalMap structure.
>
> Signed-off-by: Luc Michel <luc.mic...@amd.com>
Reviewed-by: Francisco Iglesias <francisco.igles...@amd.com>
> ---
> include/hw/arm/xlnx-versal.h | 4 ----
> hw/arm/xlnx-versal.c | 20 ++++++++++++++++----
> 2 files changed, 16 insertions(+), 8 deletions(-)
>
> diff --git a/include/hw/arm/xlnx-versal.h b/include/hw/arm/xlnx-versal.h
> index 62b8d234ecb..7be5a6ccf4d 100644
> --- a/include/hw/arm/xlnx-versal.h
> +++ b/include/hw/arm/xlnx-versal.h
> @@ -46,14 +46,10 @@ struct Versal {
> struct {
> /* 4 ranges to access DDR. */
> MemoryRegion mr_ddr_ranges[4];
> } noc;
>
> - struct {
> - MemoryRegion mr_ocm;
> - } lpd;
> -
> struct {
> uint32_t clk_25mhz;
> uint32_t clk_125mhz;
> uint32_t gic;
> } phandle;
> diff --git a/hw/arm/xlnx-versal.c b/hw/arm/xlnx-versal.c
> index 3905549b32e..f46c73ac8e7 100644
> --- a/hw/arm/xlnx-versal.c
> +++ b/hw/arm/xlnx-versal.c
> @@ -71,10 +71,15 @@ FIELD(VERSAL_IRQ, OR_IDX, 19, 4) /* input index on the
> IRQ OR gate */
> typedef struct VersalSimplePeriphMap {
> uint64_t addr;
> int irq;
> } VersalSimplePeriphMap;
>
> +typedef struct VersalMemMap {
> + uint64_t addr;
> + uint64_t size;
> +} VersalMemMap;
> +
> typedef struct VersalGicMap {
> int version;
> uint64_t dist;
> uint64_t redist;
> uint64_t cpu_iface;
> @@ -108,10 +113,12 @@ typedef struct VersalCpuClusterMap {
>
> enum StartPoweredOffMode start_powered_off;
> } VersalCpuClusterMap;
>
> typedef struct VersalMap {
> + VersalMemMap ocm;
> +
> VersalCpuClusterMap apu;
> VersalCpuClusterMap rpu;
>
> VersalSimplePeriphMap uart[2];
> size_t num_uart;
> @@ -207,10 +214,15 @@ typedef struct VersalMap {
> int irq_num;
> } reserved;
> } VersalMap;
>
> static const VersalMap VERSAL_MAP = {
> + .ocm = {
> + .addr = 0xfffc0000,
> + .size = 0x40000,
> + },
> +
> .apu = {
> .name = "apu",
> .cpu_model = ARM_CPU_TYPE_NAME("cortex-a72"),
> .num_cluster = 1,
> .num_core = 2,
> @@ -1605,10 +1617,11 @@ static uint32_t fdt_add_clk_node(Versal *s, const
> char *name,
>
> static void versal_realize(DeviceState *dev, Error **errp)
> {
> Versal *s = XLNX_VERSAL_BASE(dev);
> DeviceState *slcr, *ospi;
> + MemoryRegion *ocm;
> Object *container;
> const VersalMap *map = versal_get_map(s);
> size_t i;
>
> if (s->cfg.fdt == NULL) {
> @@ -1678,14 +1691,13 @@ static void versal_realize(DeviceState *dev, Error
> **errp)
>
> versal_map_ddr(s);
> versal_unimp(s);
>
> /* Create the On Chip Memory (OCM). */
> - memory_region_init_ram(&s->lpd.mr_ocm, OBJECT(s), "ocm",
> - MM_OCM_SIZE, &error_fatal);
> -
> - memory_region_add_subregion_overlap(&s->mr_ps, MM_OCM, &s->lpd.mr_ocm,
> 0);
> + ocm = g_new(MemoryRegion, 1);
> + memory_region_init_ram(ocm, OBJECT(s), "ocm", map->ocm.size,
> &error_fatal);
> + memory_region_add_subregion_overlap(&s->mr_ps, map->ocm.addr, ocm, 0);
> }
>
> void versal_sdhci_plug_card(Versal *s, int sd_idx, BlockBackend *blk)
> {
> DeviceState *sdhci, *card;
> --
> 2.50.0
>
