On Wed, Jul 16, 2025 at 11:54:29AM +0200, Luc Michel wrote: > Add the Versal Gen 2 Virtual development machine embedding a > versal2 SoC. This machine follows the same principle than the > xlnx-versal-virt machine. It creates its own DTB and feeds it to the > software payload. This way only implemented devices are exposed to the > guest and the user does not need to provide a DTB. > > Signed-off-by: Luc Michel <luc.mic...@amd.com>
Reviewed-by: Francisco Iglesias <francisco.igles...@amd.com> > --- > docs/system/arm/xlnx-versal-virt.rst | 49 ++++++++++++++++++++++++---- > hw/arm/xlnx-versal-virt.c | 37 +++++++++++++++++++-- > 2 files changed, 76 insertions(+), 10 deletions(-) > > diff --git a/docs/system/arm/xlnx-versal-virt.rst > b/docs/system/arm/xlnx-versal-virt.rst > index 5d7fa18592b..af56b275413 100644 > --- a/docs/system/arm/xlnx-versal-virt.rst > +++ b/docs/system/arm/xlnx-versal-virt.rst > @@ -1,16 +1,18 @@ > -AMD Versal Virt (``amd-versal-virt``) > -===================================== > +AMD Versal Virt (``amd-versal-virt``, ``amd-versal2-virt``) > +=========================================================== > > AMD Versal is a family of heterogeneous multi-core SoCs > (System on Chip) that combine traditional hardened CPUs and I/O > peripherals in a Processing System (PS) with runtime programmable > FPGA logic (PL) and an Artificial Intelligence Engine (AIE). > > -QEMU implements the Versal Series variant of Versal SoCs, with the > -``amd-versal-virt`` machine. The alias ``xlnx-versal-virt`` is kept for > -backward compatibility. > +QEMU implements two variants of Versal SoCs: > + > +- Versal (the ``amd-versal-virt`` machine, the alias ``xlnx-versal-virt`` is > + kept for backward compatibility) > +- Versal Gen 2 (the ``amd-versal2-virt`` machine) > > More details here: > https://www.amd.com/en/products/adaptive-socs-and-fpgas/versal.html > > The family of Versal SoCs share a single architecture but come in > @@ -19,10 +21,12 @@ other differences. > > The AMD Versal Virt board in QEMU is a model of a virtual board > (does not exist in reality) with a virtual Versal SoC without I/O > limitations. Currently, we support the following cores and devices: > > +Versal > +"""""" > Implemented CPU cores: > > - 2 ACPUs (ARM Cortex-A72) with their GICv3 and ITS > - 2 RCPUs (ARM Cortex-R5F) with their GICv2 > > @@ -41,20 +45,42 @@ Implemented devices: > - 2 CANFDs > - USB controller > - OSPI controller > - TRNG controller > > +Versal Gen 2 > +"""""""""""" > +Implemented CPU cores: > + > +- 8 ACPUs (ARM Cortex-A78AE) with their GICv3 and ITS > +- 10 RCPUs (ARM Cortex-R52) with their GICv3 (one per cluster) > + > +Implemented devices: > + > +- 2 UARTs (ARM PL011) > +- An RTC (Versal built-in) > +- 3 GEMs (Cadence MACB Ethernet MACs) > +- 8 ADMA (Xilinx zDMA) channels > +- 2 SD Controllers > +- OCM (256KB of On Chip Memory) > +- DDR memory > +- BBRAM (36 bytes of Battery-backed RAM) > +- 2 CANFDs > +- 2 USB controllers > +- OSPI controller > +- TRNG controller > + > QEMU does not yet model any other devices, including the PL and the AI > Engine. > > Other differences between the hardware and the QEMU model: > > - QEMU allows the amount of DDR memory provided to be specified with the > ``-m`` argument. If a DTB is provided on the command line then QEMU will > edit it to include suitable entries describing the Versal DDR memory > ranges. > > -- QEMU provides 8 virtio-mmio virtio transports; these start at > - address ``0xa0000000`` and have IRQs from 111 and upwards. > +- QEMU provides 8 virtio-mmio virtio transports. They use reserved memory > + regions and IRQ pins to avoid conflicts with real SoC peripherals. > > Running > """"""" > If the user provides an Operating System to be loaded, we expect users > to use the ``-kernel`` command line option. > @@ -212,10 +238,15 @@ To use a different index value, N, from default of 0, > add: > > -global driver=xlnx.bbram-ctrl,property=drive-index,value=N > > eFUSE File Backend > """""""""""""""""" > + > +.. note:: > + The eFUSE device is not implemented in the Versal Gen 2 QEMU model > + yet. > + > eFUSE can have an optional file backend, which must be a seekable > binary file with a size of 3072 bytes or larger. A file with all > binary 0s is a 'blank'. > > To add a file-backend for the eFUSE: > @@ -269,5 +300,9 @@ To connect CANFD0 and CANFD1 to host machine's CAN > interface can0: > > .. code-block:: bash > > -object can-bus,id=canbus -machine canbus0=canbus -machine canbus1=canbus > -object can-host-socketcan,id=canhost0,if=can0,canbus=canbus > + > +.. note:: > + Versal Gen 2 has 4 CAN controllers. ``canbus0`` to ``canbus3`` can > + be specified on the command line. > diff --git a/hw/arm/xlnx-versal-virt.c b/hw/arm/xlnx-versal-virt.c > index 154ed7332c3..8cfb7d0c380 100644 > --- a/hw/arm/xlnx-versal-virt.c > +++ b/hw/arm/xlnx-versal-virt.c > @@ -1,7 +1,7 @@ > /* > - * AMD/Xilinx Versal Virtual board. > + * AMD/Xilinx Versal family Virtual board. > * > * Copyright (c) 2018 Xilinx Inc. > * Copyright (c) 2025, Advanced Micro Devices, Inc. > * Written by Edgar E. Iglesias > * > @@ -27,10 +27,11 @@ > #define TYPE_XLNX_VERSAL_VIRT_BASE_MACHINE \ > MACHINE_TYPE_NAME("amd-versal-virt-base") > OBJECT_DECLARE_TYPE(VersalVirt, VersalVirtClass, > XLNX_VERSAL_VIRT_BASE_MACHINE) > > #define TYPE_XLNX_VERSAL_VIRT_MACHINE MACHINE_TYPE_NAME("amd-versal-virt") > +#define TYPE_XLNX_VERSAL2_VIRT_MACHINE MACHINE_TYPE_NAME("amd-versal2-virt") > > #define XLNX_VERSAL_NUM_OSPI_FLASH 4 > > struct VersalVirt { > MachineState parent_obj; > @@ -55,11 +56,13 @@ struct VersalVirtClass { > }; > > static void fdt_create(VersalVirt *s) > { > MachineClass *mc = MACHINE_GET_CLASS(s); > + VersalVirtClass *vvc = XLNX_VERSAL_VIRT_BASE_MACHINE_GET_CLASS(s); > const char versal_compat[] = "amd-versal-virt\0xlnx-versal-virt"; > + const char versal2_compat[] = "amd-versal2-virt"; > > s->fdt = create_device_tree(&s->fdt_size); > if (!s->fdt) { > error_report("create_device_tree() failed"); > exit(1); > @@ -69,12 +72,22 @@ static void fdt_create(VersalVirt *s) > qemu_fdt_add_subnode(s->fdt, "/chosen"); > qemu_fdt_add_subnode(s->fdt, "/aliases"); > > /* Header */ > qemu_fdt_setprop_string(s->fdt, "/", "model", mc->desc); > - qemu_fdt_setprop(s->fdt, "/", "compatible", versal_compat, > - sizeof(versal_compat)); > + > + switch (vvc->version) { > + case VERSAL_VER_VERSAL: > + qemu_fdt_setprop(s->fdt, "/", "compatible", versal_compat, > + sizeof(versal_compat)); > + break; > + > + case VERSAL_VER_VERSAL2: > + qemu_fdt_setprop(s->fdt, "/", "compatible", versal2_compat, > + sizeof(versal2_compat)); > + break; > + } > } > > static void fdt_nop_memory_nodes(void *fdt, Error **errp) > { > Error *err = NULL; > @@ -362,10 +375,21 @@ static void versal_virt_machine_class_init(ObjectClass > *oc, const void *data) > vvc->version = VERSAL_VER_VERSAL; > > versal_virt_machine_class_init_common(oc); > } > > +static void versal2_virt_machine_class_init(ObjectClass *oc, const void > *data) > +{ > + MachineClass *mc = MACHINE_CLASS(oc); > + VersalVirtClass *vvc = XLNX_VERSAL_VIRT_BASE_MACHINE_CLASS(oc); > + > + mc->desc = "AMD Versal Gen 2 Virtual development board"; > + vvc->version = VERSAL_VER_VERSAL2; > + > + versal_virt_machine_class_init_common(oc); > +} > + > static const TypeInfo versal_virt_base_machine_init_typeinfo = { > .name = TYPE_XLNX_VERSAL_VIRT_BASE_MACHINE, > .parent = TYPE_MACHINE, > .class_size = sizeof(VersalVirtClass), > .instance_init = versal_virt_machine_instance_init, > @@ -378,12 +402,19 @@ static const TypeInfo versal_virt_machine_init_typeinfo > = { > .name = TYPE_XLNX_VERSAL_VIRT_MACHINE, > .parent = TYPE_XLNX_VERSAL_VIRT_BASE_MACHINE, > .class_init = versal_virt_machine_class_init, > }; > > +static const TypeInfo versal2_virt_machine_init_typeinfo = { > + .name = TYPE_XLNX_VERSAL2_VIRT_MACHINE, > + .parent = TYPE_XLNX_VERSAL_VIRT_BASE_MACHINE, > + .class_init = versal2_virt_machine_class_init, > +}; > + > static void versal_virt_machine_init_register_types(void) > { > type_register_static(&versal_virt_base_machine_init_typeinfo); > type_register_static(&versal_virt_machine_init_typeinfo); > + type_register_static(&versal2_virt_machine_init_typeinfo); > } > > type_init(versal_virt_machine_init_register_types) > -- > 2.50.0 >
