Thank you for the update! Apologies for the error in the cover letter. On Fri, Aug 1, 2025 at 10:01 AM Peter Maydell <peter.mayd...@linaro.org> wrote:
> On Tue, 22 Jul 2025 at 18:37, Vacha Bhavsar > <vacha.bhav...@oss.qualcomm.com> wrote: > > > > Upon examining the current implementation for getting/setting SIMD > > and SVE registers via remote GDB, there is a concern about mixed > > endian support. This patch series aims to address this concern and > > allow getting and setting the values of NEON and SVE registers via > > remote GDB regardless of the target endianness. > > Thanks; I've applied these patches to target-arm.next (with > a bit of tweaking of the commit messages). > > Something seems to have gone wrong with the creation of > this cover letter, by the way: it lists a lot of > patches that aren't in it. > > > Glenn Miles (12): > > ppc/xive2: Fix calculation of END queue sizes > > ppc/xive2: Use fair irq target search algorithm > > ppc/xive2: Fix irq preempted by lower priority group irq > > [etc] > > thanks > -- PMM >
