[PATCH v2 06/10] target/loongarch: Add MMUContext parameter in fill_tlb_entry()

[Bibo Mao]

Function fill_tlb_entry() can be used with hardware PTW in future,
here add input parameter MMUContext in fill_tlb_entry().

Signed-off-by: Bibo Mao <maob...@loongson.cn>
---
 target/loongarch/tcg/tlb_helper.c | 21 ++++++++++++---------
 1 file changed, 12 insertions(+), 9 deletions(-)

diff --git a/target/loongarch/tcg/tlb_helper.c 
b/target/loongarch/tcg/tlb_helper.c
index 67b8f95849..50c7583c6c 100644
--- a/target/loongarch/tcg/tlb_helper.c
+++ b/target/loongarch/tcg/tlb_helper.c
@@ -202,25 +202,24 @@ static void sptw_prepare_context(CPULoongArchState *env, 
MMUContext *context)
     context->addr  = csr_vppn << R_TLB_MISC_VPPN_SHIFT;
 }
 
-static void fill_tlb_entry(CPULoongArchState *env, LoongArchTLB *tlb)
+static void fill_tlb_entry(CPULoongArchState *env, LoongArchTLB *tlb,
+                           MMUContext *context)
 {
     uint64_t csr_vppn;
     uint16_t csr_asid;
-    MMUContext context;
 
-    sptw_prepare_context(env, &context);
-    csr_vppn = context.addr >> R_TLB_MISC_VPPN_SHIFT;
+    csr_vppn = context->addr >> R_TLB_MISC_VPPN_SHIFT;
 
     /* Store page size in field PS */
     tlb->tlb_misc = 0;
-    tlb->tlb_misc = FIELD_DP64(tlb->tlb_misc, TLB_MISC, PS, context.ps);
+    tlb->tlb_misc = FIELD_DP64(tlb->tlb_misc, TLB_MISC, PS, context->ps);
     tlb->tlb_misc = FIELD_DP64(tlb->tlb_misc, TLB_MISC, VPPN, csr_vppn);
     tlb->tlb_misc = FIELD_DP64(tlb->tlb_misc, TLB_MISC, E, 1);
     csr_asid = FIELD_EX64(env->CSR_ASID, CSR_ASID, ASID);
     tlb->tlb_misc = FIELD_DP64(tlb->tlb_misc, TLB_MISC, ASID, csr_asid);
 
-    tlb->tlb_entry0 = context.pte_buddy[0];
-    tlb->tlb_entry1 = context.pte_buddy[1];
+    tlb->tlb_entry0 = context->pte_buddy[0];
+    tlb->tlb_entry1 = context->pte_buddy[1];
 }
 
 /* Return an random value between low and high */
@@ -359,6 +358,7 @@ void helper_tlbwr(CPULoongArchState *env)
     LoongArchTLB *old, new;
     bool skip_inv = false;
     uint8_t tlb_v0, tlb_v1;
+    MMUContext context;
 
     old = env->tlb + index;
     if (FIELD_EX64(env->CSR_TLBIDX, CSR_TLBIDX, NE)) {
@@ -366,10 +366,11 @@ void helper_tlbwr(CPULoongArchState *env)
         return;
     }
 
+    sptw_prepare_context(env, &context);
     new.tlb_misc = 0;
     new.tlb_entry0 = 0;
     new.tlb_entry1 = 0;
-    fill_tlb_entry(env, &new);
+    fill_tlb_entry(env, &new, &context);
     /* Check whether ASID/VPPN is the same */
     if (old->tlb_misc == new.tlb_misc) {
         /* Check whether pte is the same or invalid */
@@ -456,6 +457,7 @@ void helper_tlbfill(CPULoongArchState *env)
 {
     uint64_t entryhi;
     int index, pagesize;
+    MMUContext context;
 
     if (FIELD_EX64(env->CSR_TLBRERA, CSR_TLBRERA, ISTLBR)) {
         entryhi = env->CSR_TLBREHI;
@@ -467,9 +469,10 @@ void helper_tlbfill(CPULoongArchState *env)
         pagesize = FIELD_EX64(env->CSR_TLBIDX, CSR_TLBIDX, PS);
     }
 
+    sptw_prepare_context(env, &context);
     index = get_tlb_random_index(env, entryhi, pagesize);
     invalidate_tlb(env, index);
-    fill_tlb_entry(env, env->tlb + index);
+    fill_tlb_entry(env, env->tlb + index, &context);
 }
 
 void helper_tlbclr(CPULoongArchState *env)
-- 
2.39.3