Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
---
target/arm/cpregs.h | 22 ++++---------
target/arm/gdbstub.c | 2 ++
target/arm/helper.c | 57 +++-------------------------------
target/arm/tcg/translate-a64.c | 12 +++++++
4 files changed, 25 insertions(+), 68 deletions(-)
diff --git a/target/arm/cpregs.h b/target/arm/cpregs.h
index d34ed0d40b..f5d6a1c386 100644
--- a/target/arm/cpregs.h
+++ b/target/arm/cpregs.h
@@ -917,8 +917,12 @@ struct ARMCPRegInfo {
*/
uint32_t vhe_redir_to_el2;
- /* This is used only by VHE. */
- void *opaque;
+ /*
+ * With VHE, with E2H, at EL2+, access to this EL02/EL12 reg
+ * redirects to the EL0/EL1 reg with the specified key.
+ */
+ uint32_t vhe_redir_to_el01;
+
/*
* Value of this register, if it is ARM_CP_CONST. Otherwise, if
* fieldoffset is non-zero, the reset value of the register.
@@ -986,20 +990,6 @@ struct ARMCPRegInfo {
* fieldoffset is 0 then no reset will be done.
*/
CPResetFn *resetfn;
-
- /*
- * "Original" readfn, writefn, accessfn.
- * For ARMv8.1-VHE register aliases, we overwrite the read/write
- * accessor functions of various EL1/EL0 to perform the runtime
- * check for which sysreg should actually be modified, and then
- * forwards the operation. Before overwriting the accessors,
- * the original function is copied here, so that accesses that
- * really do go to the EL1/EL0 version proceed normally.
- * (The corresponding EL2 register is linked via opaque.)
- */
- CPReadFn *orig_readfn;
- CPWriteFn *orig_writefn;
- CPAccessFn *orig_accessfn;
};
void define_one_arm_cp_reg(ARMCPU *cpu, const ARMCPRegInfo *regs);
diff --git a/target/arm/gdbstub.c b/target/arm/gdbstub.c
index 3727dc01af..269bc6c132 100644
--- a/target/arm/gdbstub.c
+++ b/target/arm/gdbstub.c
@@ -253,6 +253,8 @@ static int arm_gdb_get_sysreg(CPUState *cs, GByteArray
*buf, int reg)
(arm_hcr_el2_eff(env) & HCR_E2H) &&
arm_current_el(env) == 2) {
ri = get_arm_cp_reginfo(cpu->cp_regs, ri->vhe_redir_to_el2);
+ } else if (ri->vhe_redir_to_el01) {
+ ri = get_arm_cp_reginfo(cpu->cp_regs, ri->vhe_redir_to_el01);
}
return gdb_get_reg64(buf, (uint64_t)read_raw_cp_reg(env, ri));
case MO_32:
diff --git a/target/arm/helper.c b/target/arm/helper.c
index 3f69ce6cb5..a19406e136 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -4441,42 +4441,6 @@ static CPAccessResult access_el1nvvct(CPUARMState *env,
const ARMCPRegInfo *ri,
return e2h_access(env, ri, isread);
}
-static uint64_t el2_e2h_e12_read(CPUARMState *env, const ARMCPRegInfo *ri)
-{
- /* Pass the EL1 register accessor its ri, not the EL12 alias ri */
- return ri->orig_readfn(env, ri->opaque);
-}
-
-static void el2_e2h_e12_write(CPUARMState *env, const ARMCPRegInfo *ri,
- uint64_t value)
-{
- /* Pass the EL1 register accessor its ri, not the EL12 alias ri */
- return ri->orig_writefn(env, ri->opaque, value);
-}
-
-static CPAccessResult el2_e2h_e12_access(CPUARMState *env,
- const ARMCPRegInfo *ri,
- bool isread)
-{
- if (arm_current_el(env) == 1) {
- /*
- * This must be a FEAT_NV access (will either trap or redirect
- * to memory). None of the registers with _EL12 aliases want to
- * apply their trap controls for this kind of access, so don't
- * call the orig_accessfn or do the "UNDEF when E2H is 0" check.
- */
- return CP_ACCESS_OK;
- }
- /* FOO_EL12 aliases only exist when E2H is 1; otherwise they UNDEF */
- if (!(arm_hcr_el2_eff(env) & HCR_E2H)) {
- return CP_ACCESS_UNDEFINED;
- }
- if (ri->orig_accessfn) {
- return ri->orig_accessfn(env, ri->opaque, isread);
- }
- return CP_ACCESS_OK;
-}
-
static void define_arm_vh_e2h_redirects_aliases(ARMCPU *cpu)
{
struct E2HAlias {
@@ -4566,9 +4530,6 @@ static void define_arm_vh_e2h_redirects_aliases(ARMCPU
*cpu)
g_assert(strcmp(src_reg->name, a->src_name) == 0);
g_assert(strcmp(dst_reg->name, a->dst_name) == 0);
- /* None of the core system registers use opaque; we will. */
- g_assert(src_reg->opaque == NULL);
-
/* Create alias before redirection so we dup the right data. */
new_reg = g_memdup(src_reg, sizeof(ARMCPRegInfo));
@@ -4587,19 +4548,11 @@ static void define_arm_vh_e2h_redirects_aliases(ARMCPU
*cpu)
>> CP_REG_ARM64_SYSREG_OP1_SHIFT;
new_reg->opc2 = (a->new_key & CP_REG_ARM64_SYSREG_OP2_MASK)
>> CP_REG_ARM64_SYSREG_OP2_SHIFT;
- new_reg->opaque = src_reg;
- new_reg->orig_readfn = src_reg->readfn ?: raw_read;
- new_reg->orig_writefn = src_reg->writefn ?: raw_write;
- new_reg->orig_accessfn = src_reg->accessfn;
- if (!new_reg->raw_readfn) {
- new_reg->raw_readfn = raw_read;
- }
- if (!new_reg->raw_writefn) {
- new_reg->raw_writefn = raw_write;
- }
- new_reg->readfn = el2_e2h_e12_read;
- new_reg->writefn = el2_e2h_e12_write;
- new_reg->accessfn = el2_e2h_e12_access;
+ new_reg->vhe_redir_to_el01 = a->src_key;
+ new_reg->readfn = NULL;
+ new_reg->writefn = NULL;
+ new_reg->accessfn = NULL;
+ new_reg->fieldoffset = 0;
/*
* If the _EL1 register is redirected to memory by FEAT_NV2,
diff --git a/target/arm/tcg/translate-a64.c b/target/arm/tcg/translate-a64.c
index 8fcc74d151..7de8717056 100644
--- a/target/arm/tcg/translate-a64.c
+++ b/target/arm/tcg/translate-a64.c
@@ -2580,6 +2580,18 @@ static void handle_sys(DisasContext *s, bool isread,
*/
key = ri->vhe_redir_to_el2;
ri = redirect_cpreg(s, key, isread);
+ } else if (ri->vhe_redir_to_el01 && s->current_el >= 2) {
+ /*
+ * This is one of the FOO_EL12 registers.
+ * With !E2H, they all UNDEF.
+ * With E2H, from EL2 or EL3, they redirect to FOO_EL1.
+ */
+ if (!s->e2h) {
+ gen_sysreg_undef(s, isread, op0, op1, op2, crn, crm, rt);
+ return;
+ }
+ key = ri->vhe_redir_to_el01;
+ ri = redirect_cpreg(s, key, isread);
}
if (ri->accessfn || (ri->fgt && s->fgt_active)) {
--
2.43.0
