Move the writeback of cp, crm, opc1, opc2 to define_one_arm_cp_reg,
which means we don't have to pass all those parameters down
to subroutines.
Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
---
target/arm/helper.c | 52 ++++++++++++++++++++++-----------------------
1 file changed, 26 insertions(+), 26 deletions(-)
diff --git a/target/arm/helper.c b/target/arm/helper.c
index 1a321ad181..66e70abc76 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -7291,7 +7291,6 @@ static ARMCPRegInfo *alloc_cpreg(const ARMCPRegInfo *in,
const char *suffix)
*/
static void add_cpreg_to_hashtable(ARMCPU *cpu, ARMCPRegInfo *r,
CPState state, CPSecureState secstate,
- int cp, int crm, int opc1, int opc2,
uint32_t key)
{
CPUARMState *env = &cpu->env;
@@ -7358,12 +7357,8 @@ static void add_cpreg_to_hashtable(ARMCPU *cpu,
ARMCPRegInfo *r,
/*
* Update fields to match the instantiation, overwiting wildcards
- * such as CP_ANY, ARM_CP_STATE_BOTH, or ARM_CP_SECSTATE_BOTH.
+ * such as ARM_CP_STATE_BOTH or ARM_CP_SECSTATE_BOTH.
*/
- r->cp = cp;
- r->crm = crm;
- r->opc1 = opc1;
- r->opc2 = opc2;
r->state = state;
r->secure = secstate;
@@ -7379,8 +7374,7 @@ static void add_cpreg_to_hashtable(ARMCPU *cpu,
ARMCPRegInfo *r,
g_hash_table_insert(cpu->cp_regs, (gpointer)(uintptr_t)key, r);
}
-static void add_cpreg_to_hashtable_aa32(ARMCPU *cpu, ARMCPRegInfo *r,
- int cp, int crm, int opc1, int opc2)
+static void add_cpreg_to_hashtable_aa32(ARMCPU *cpu, ARMCPRegInfo *r)
{
/*
* Under AArch32 CP registers can be common
@@ -7388,7 +7382,8 @@ static void add_cpreg_to_hashtable_aa32(ARMCPU *cpu,
ARMCPRegInfo *r,
*/
ARMCPRegInfo *r_s;
bool is64 = r->type & ARM_CP_64BIT;
- uint32_t key = ENCODE_CP_REG(cp, is64, 0, r->crn, crm, opc1, opc2);
+ uint32_t key = ENCODE_CP_REG(r->cp, is64, 0, r->crn,
+ r->crm, r->opc1, r->opc2);
assert(!(r->type & ARM_CP_ADD_TLBI_NXS)); /* aa64 only */
@@ -7397,27 +7392,26 @@ static void add_cpreg_to_hashtable_aa32(ARMCPU *cpu,
ARMCPRegInfo *r,
key |= CP_REG_AA32_NS_MASK;
/* fall through */
case ARM_CP_SECSTATE_S:
- add_cpreg_to_hashtable(cpu, r, ARM_CP_STATE_AA32, r->secure,
- cp, crm, opc1, opc2, key);
+ add_cpreg_to_hashtable(cpu, r, ARM_CP_STATE_AA32, r->secure, key);
break;
case ARM_CP_SECSTATE_BOTH:
r_s = alloc_cpreg(r, "_S");
- add_cpreg_to_hashtable(cpu, r_s, ARM_CP_STATE_AA32, ARM_CP_SECSTATE_S,
- cp, crm, opc1, opc2, key);
+ add_cpreg_to_hashtable(cpu, r_s, ARM_CP_STATE_AA32,
+ ARM_CP_SECSTATE_S, key);
key |= CP_REG_AA32_NS_MASK;
- add_cpreg_to_hashtable(cpu, r, ARM_CP_STATE_AA32, ARM_CP_SECSTATE_NS,
- cp, crm, opc1, opc2, key);
+ add_cpreg_to_hashtable(cpu, r, ARM_CP_STATE_AA32,
+ ARM_CP_SECSTATE_NS, key);
break;
default:
g_assert_not_reached();
}
}
-static void add_cpreg_to_hashtable_aa64(ARMCPU *cpu, ARMCPRegInfo *r,
- int crm, int opc1, int opc2)
+static void add_cpreg_to_hashtable_aa64(ARMCPU *cpu, ARMCPRegInfo *r)
{
- uint32_t key = ENCODE_AA64_CP_REG(r->opc0, opc1, r->crn, crm, opc2);
+ uint32_t key = ENCODE_AA64_CP_REG(r->opc0, r->opc1,
+ r->crn, r->crm, r->opc2);
if ((r->type & ARM_CP_ADD_TLBI_NXS) &&
cpu_isar_feature(aa64_xs, cpu)) {
@@ -7442,12 +7436,11 @@ static void add_cpreg_to_hashtable_aa64(ARMCPU *cpu,
ARMCPRegInfo *r,
}
add_cpreg_to_hashtable(cpu, nxs_ri, ARM_CP_STATE_AA64,
- ARM_CP_SECSTATE_NS, 0, crm, opc1, opc2,
- nxs_key);
+ ARM_CP_SECSTATE_NS, nxs_key);
}
- add_cpreg_to_hashtable(cpu, r, ARM_CP_STATE_AA64, ARM_CP_SECSTATE_NS,
- 0, crm, opc1, opc2, key);
+ add_cpreg_to_hashtable(cpu, r, ARM_CP_STATE_AA64,
+ ARM_CP_SECSTATE_NS, key);
}
void define_one_arm_cp_reg(ARMCPU *cpu, const ARMCPRegInfo *r)
@@ -7667,17 +7660,24 @@ void define_one_arm_cp_reg(ARMCPU *cpu, const
ARMCPRegInfo *r)
r2->type |= ARM_CP_ALIAS | ARM_CP_NO_GDB;
}
+ /* Overwrite CP_ANY with the instantiation. */
+ r2->crm = crm;
+ r2->opc1 = opc1;
+ r2->opc2 = opc2;
+
switch (r->state) {
case ARM_CP_STATE_AA32:
- add_cpreg_to_hashtable_aa32(cpu, r2, cp, crm, opc1, opc2);
+ add_cpreg_to_hashtable_aa32(cpu, r2);
break;
case ARM_CP_STATE_AA64:
- add_cpreg_to_hashtable_aa64(cpu, r2, crm, opc1, opc2);
+ add_cpreg_to_hashtable_aa64(cpu, r2);
break;
case ARM_CP_STATE_BOTH:
r3 = alloc_cpreg(r2, NULL);
- add_cpreg_to_hashtable_aa32(cpu, r2, cp, crm, opc1, opc2);
- add_cpreg_to_hashtable_aa64(cpu, r3, crm, opc1, opc2);
+ r2->cp = cp;
+ add_cpreg_to_hashtable_aa32(cpu, r2);
+ r3->cp = 0;
+ add_cpreg_to_hashtable_aa64(cpu, r3);
break;
default:
g_assert_not_reached();
--
2.43.0
