On 10/13/25 12:43 PM, Zejun Zhao wrote:
On Mon, 13 Oct 2025 11:38:48 -0300, Daniel wrote:
But the documentation I found [1] seems to indicate that it should
support sv48.
The second paragraph after the referenced Table 9 from [1] states:
For RV64 architectures on SiFive designs,satp.MODE=8 is used for Sv39
virtual addressing, and no other modes are currently supported.
And here is the same statement from [1]:
The U5 has support for virtual memory through the use of a Memory
Management Unit (MMU). The MMU supports the Bare and Sv39 modes as
described inThe RISC‑V Instruction Set Man-ual, Volume II: Privileged
Architecture, Version 1.10.
So I believe we should not try to support Sv48 for this hart. Hardcoding
it to Sv39 should be fine and correct.
Makes sense. I believe we can proceed with the changes then.
Thanks,
Daniel
Regards,
Zejun
[1] https://starfivetech.com/uploads/u54_core_complex_manual_21G1.pdf
