In order to remove the convenient CPUState::as field, access
the vcpu first address space using the cpu_get_address_space()
helper.

Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
---
 target/loongarch/cpu_helper.c     | 5 +++--
 target/loongarch/tcg/tlb_helper.c | 7 +++++--
 2 files changed, 8 insertions(+), 4 deletions(-)

diff --git a/target/loongarch/cpu_helper.c b/target/loongarch/cpu_helper.c
index 4a9db3ea4c1..f2ee66d0d52 100644
--- a/target/loongarch/cpu_helper.c
+++ b/target/loongarch/cpu_helper.c
@@ -110,6 +110,7 @@ static TLBRet loongarch_page_table_walker(CPULoongArchState 
*env,
                                           int access_type, int mmu_idx)
 {
     CPUState *cs = env_cpu(env);
+    AddressSpace *as = cpu_get_address_space(cs, 0);
     target_ulong index, phys;
     uint64_t dir_base, dir_width;
     uint64_t base;
@@ -134,7 +135,7 @@ static TLBRet loongarch_page_table_walker(CPULoongArchState 
*env,
         /* get next level page directory */
         index = (address >> dir_base) & ((1 << dir_width) - 1);
         phys = base | index << 3;
-        base = ldq_phys(cs->as, phys) & TARGET_PHYS_MASK;
+        base = ldq_phys(as, phys) & TARGET_PHYS_MASK;
         if (FIELD_EX64(base, TLBENTRY, HUGE)) {
             /* base is a huge pte */
             break;
@@ -155,7 +156,7 @@ static TLBRet loongarch_page_table_walker(CPULoongArchState 
*env,
         get_dir_base_width(env, &dir_base, &dir_width, 0);
         index = (address >> dir_base) & ((1 << dir_width) - 1);
         phys = base | index << 3;
-        base = ldq_phys(cs->as, phys);
+        base = ldq_phys(as, phys);
     }
 
     context->ps = dir_base;
diff --git a/target/loongarch/tcg/tlb_helper.c 
b/target/loongarch/tcg/tlb_helper.c
index 8cfce48a297..5173e30b531 100644
--- a/target/loongarch/tcg/tlb_helper.c
+++ b/target/loongarch/tcg/tlb_helper.c
@@ -600,6 +600,7 @@ target_ulong helper_lddir(CPULoongArchState *env, 
target_ulong base,
     CPUState *cs = env_cpu(env);
     target_ulong badvaddr, index, phys;
     uint64_t dir_base, dir_width;
+    AddressSpace *as;
 
     if (unlikely((level == 0) || (level > 4))) {
         qemu_log_mask(LOG_GUEST_ERROR,
@@ -621,12 +622,13 @@ target_ulong helper_lddir(CPULoongArchState *env, 
target_ulong base,
         }
     }
 
+    as = cpu_get_address_space(cs, 0);
     badvaddr = env->CSR_TLBRBADV;
     base = base & TARGET_PHYS_MASK;
     get_dir_base_width(env, &dir_base, &dir_width, level);
     index = (badvaddr >> dir_base) & ((1 << dir_width) - 1);
     phys = base | index << 3;
-    return ldq_phys(cs->as, phys) & TARGET_PHYS_MASK;
+    return ldq_phys(as, phys) & TARGET_PHYS_MASK;
 }
 
 void helper_ldpte(CPULoongArchState *env, target_ulong base, target_ulong odd,
@@ -680,6 +682,7 @@ void helper_ldpte(CPULoongArchState *env, target_ulong 
base, target_ulong odd,
             return;
         }
     } else {
+        AddressSpace *as = cpu_get_address_space(cs, 0);
         badv = env->CSR_TLBRBADV;
 
         ptindex = (badv >> ptbase) & ((1 << ptwidth) - 1);
@@ -687,7 +690,7 @@ void helper_ldpte(CPULoongArchState *env, target_ulong 
base, target_ulong odd,
         ptoffset0 = ptindex << 3;
         ptoffset1 = (ptindex + 1) << 3;
         phys = base | (odd ? ptoffset1 : ptoffset0);
-        tmp0 = ldq_phys(cs->as, phys) & TARGET_PHYS_MASK;
+        tmp0 = ldq_phys(as, phys) & TARGET_PHYS_MASK;
         ps = ptbase;
     }
 
-- 
2.51.0


Reply via email to