geilen takes the values 31 or 63, fix it to 8 bits. hgeie and hgeip are at most 64 bits in size, fix to 64. Update relevant function arguments.
Signed-off-by: Anton Johansson <[email protected]> Reviewed-by: Pierrick Bouvier <[email protected]> Acked-by: Alistair Francis <[email protected]> --- target/riscv/cpu.h | 10 +++++----- target/riscv/cpu_helper.c | 4 ++-- target/riscv/machine.c | 4 ++-- 3 files changed, 9 insertions(+), 9 deletions(-) diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h index 4c42971809..5f051796f4 100644 --- a/target/riscv/cpu.h +++ b/target/riscv/cpu.h @@ -279,7 +279,7 @@ struct CPUArchState { #ifndef CONFIG_USER_ONLY /* This contains QEMU specific information about the virt state. */ bool virt_enabled; - target_ulong geilen; + uint8_t geilen; uint64_t resetvec; uint64_t mhartid; @@ -356,8 +356,8 @@ struct CPUArchState { uint64_t htval; uint64_t htinst; uint64_t hgatp; - target_ulong hgeie; - target_ulong hgeip; + uint64_t hgeie; + uint64_t hgeip; uint64_t htimedelta; uint64_t hvien; @@ -609,8 +609,8 @@ int riscv_cpu_mirq_pending(CPURISCVState *env); int riscv_cpu_sirq_pending(CPURISCVState *env); int riscv_cpu_vsirq_pending(CPURISCVState *env); bool riscv_cpu_fp_enabled(CPURISCVState *env); -target_ulong riscv_cpu_get_geilen(CPURISCVState *env); -void riscv_cpu_set_geilen(CPURISCVState *env, target_ulong geilen); +uint8_t riscv_cpu_get_geilen(CPURISCVState *env); +void riscv_cpu_set_geilen(CPURISCVState *env, uint8_t geilen); bool riscv_cpu_vector_enabled(CPURISCVState *env); void riscv_cpu_set_virt_enabled(CPURISCVState *env, bool enable); int riscv_env_mmu_index(CPURISCVState *env, bool ifetch); diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c index 38b57bc622..e0a324b401 100644 --- a/target/riscv/cpu_helper.c +++ b/target/riscv/cpu_helper.c @@ -661,7 +661,7 @@ void riscv_cpu_swap_hypervisor_regs(CPURISCVState *env) } } -target_ulong riscv_cpu_get_geilen(CPURISCVState *env) +uint8_t riscv_cpu_get_geilen(CPURISCVState *env) { if (!riscv_has_ext(env, RVH)) { return 0; @@ -670,7 +670,7 @@ target_ulong riscv_cpu_get_geilen(CPURISCVState *env) return env->geilen; } -void riscv_cpu_set_geilen(CPURISCVState *env, target_ulong geilen) +void riscv_cpu_set_geilen(CPURISCVState *env, uint8_t geilen) { if (!riscv_has_ext(env, RVH)) { return; diff --git a/target/riscv/machine.c b/target/riscv/machine.c index ce5e44325d..8a8f5be8d6 100644 --- a/target/riscv/machine.c +++ b/target/riscv/machine.c @@ -91,8 +91,8 @@ static const VMStateDescription vmstate_hyper = { VMSTATE_UINT64(env.htval, RISCVCPU), VMSTATE_UINT64(env.htinst, RISCVCPU), VMSTATE_UINT64(env.hgatp, RISCVCPU), - VMSTATE_UINTTL(env.hgeie, RISCVCPU), - VMSTATE_UINTTL(env.hgeip, RISCVCPU), + VMSTATE_UINT64(env.hgeie, RISCVCPU), + VMSTATE_UINT64(env.hgeip, RISCVCPU), VMSTATE_UINT64(env.hvien, RISCVCPU), VMSTATE_UINT64(env.hvip, RISCVCPU), VMSTATE_UINT64(env.htimedelta, RISCVCPU), -- 2.51.0
