On 11/6/25 15:47, Daniel Henrique Barboza wrote:
On 11/6/25 11:31 AM, Roan Richmond wrote:
I understand your point about doing the check before the 2 ld_tl() and the 2 dst_gpr()
calls.
My reasoning for doing the check after was the wording of the specification:
"LD instructions with destination x0 are processed as any other load, but the result is
discarded entirely and x1 is not written"
This suggests that a load instruction is still dispatched but the result is
then discarded.
...
+/* Zilsd extension adds load/store double for 32bit arch */
+static bool gen_load_zilsd(DisasContext *ctx, arg_lb *a)
+{
+ TCGv dest_1 = dest_gpr(ctx, a->rd);
+ TCGv dest_2 = dest_gpr(ctx, (a->rd)+1);
+ TCGv addr_1 = get_address(ctx, a->rs1, a->imm);
+ TCGv addr_2 = get_address(ctx, a->rs1, (a->imm)+4);
+
+ tcg_gen_qemu_ld_tl(dest_1, addr_1, ctx->mem_idx, MO_SL);
+ tcg_gen_qemu_ld_tl(dest_2, addr_2, ctx->mem_idx, MO_SL);
+
+ /* If destination is x0 then result of the load is discarded */
+ if (a->rd == 0) {
+ return true;
+ }
If you're looking to not write to r1, then you need to use true temporaries, not
dest_gpr(), which may return r1, which will be modified by the load.
You can drop the unnecessary () in those a->{rd,imm} + c expressions.
