Am 29.12.2011 17:19, schrieb Mark Langsdorf:
> From: Rob Herring <[email protected]>
>
> This is just a dummy device for ARM L2 cache controllers, based on the
> pl310. The cache type parameter can be defined by a property value
> and has a meaningful default.
>
> Signed-off-by: Rob Herring <[email protected]>
> Signed-off-by: Mark Langsdorf <[email protected]>
> diff --git a/hw/arm_l2x0.c b/hw/arm_l2x0.c
> new file mode 100644
> index 0000000..ba106f1
> --- /dev/null
> +++ b/hw/arm_l2x0.c
[...]
> +static SysBusDeviceInfo l2x0_info = {
> + .init = l2x0_priv_init,
> + .qdev.name = "l2x0",
> + .qdev.size = sizeof(l2x0_state),
> + .qdev.vmsd = &vmstate_l2x0,
> + .qdev.no_user = 1,
> + .qdev.props = (Property[]) {
> + DEFINE_PROP_UINT32("type", l2x0_state, cache_type, 0x1c100100),
Mark, this "type" property conflicts with a QOM refactoring by Paolo.
Mind if we rename it to "cache-type"? It always has its default value in
upstream.
Thanks,
Andreas
> + DEFINE_PROP_END_OF_LIST(),
> + },
> + .qdev.reset = l2x0_priv_reset,
> +};
> +
> +static void l2x0_register_device(void)
> +{
> + sysbus_register_withprop(&l2x0_info);
> +}
> +
> +device_init(l2x0_register_device)
> +
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