From: Anton Blanchard <[email protected]> We were marking vadc and vsbc as vm=1 instructions, which meant vext_check_input_eew wouldn't detect mask vs source register overlaps.
Signed-off-by: Anton Blanchard <[email protected]> Reviewed-by: Max Chou <[email protected]> Reviewed-by: Nutty Liu <[email protected]> Signed-off-by: Max Chou <[email protected]> --- target/riscv/insn32.decode | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/target/riscv/insn32.decode b/target/riscv/insn32.decode index b341832e41f..3647ec7f941 100644 --- a/target/riscv/insn32.decode +++ b/target/riscv/insn32.decode @@ -459,14 +459,14 @@ vwsubu_wv 110110 . ..... ..... 010 ..... 1010111 @r_vm vwsubu_wx 110110 . ..... ..... 110 ..... 1010111 @r_vm vwsub_wv 110111 . ..... ..... 010 ..... 1010111 @r_vm vwsub_wx 110111 . ..... ..... 110 ..... 1010111 @r_vm -vadc_vvm 010000 0 ..... ..... 000 ..... 1010111 @r_vm_1 -vadc_vxm 010000 0 ..... ..... 100 ..... 1010111 @r_vm_1 -vadc_vim 010000 0 ..... ..... 011 ..... 1010111 @r_vm_1 +vadc_vvm 010000 0 ..... ..... 000 ..... 1010111 @r_vm_0 +vadc_vxm 010000 0 ..... ..... 100 ..... 1010111 @r_vm_0 +vadc_vim 010000 0 ..... ..... 011 ..... 1010111 @r_vm_0 vmadc_vvm 010001 . ..... ..... 000 ..... 1010111 @r_vm vmadc_vxm 010001 . ..... ..... 100 ..... 1010111 @r_vm vmadc_vim 010001 . ..... ..... 011 ..... 1010111 @r_vm -vsbc_vvm 010010 0 ..... ..... 000 ..... 1010111 @r_vm_1 -vsbc_vxm 010010 0 ..... ..... 100 ..... 1010111 @r_vm_1 +vsbc_vvm 010010 0 ..... ..... 000 ..... 1010111 @r_vm_0 +vsbc_vxm 010010 0 ..... ..... 100 ..... 1010111 @r_vm_0 vmsbc_vvm 010011 . ..... ..... 000 ..... 1010111 @r_vm vmsbc_vxm 010011 . ..... ..... 100 ..... 1010111 @r_vm vand_vv 001001 . ..... ..... 000 ..... 1010111 @r_vm -- 2.43.0
