pci_bridge_exitfn() is called by PCI bridges DeviceUnrealize
path. Rename using _unrealize() suffix to clarify that.
Mechanical change doing:
$ sed -i -e s/pci_bridge_exitfn/pci_bridge_unrealize/ \
$(git grep -wl pci_bridge_exitfn)
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
---
include/hw/pci/pci_bridge.h | 2 +-
hw/pci-bridge/cxl_downstream.c | 4 ++--
hw/pci-bridge/cxl_upstream.c | 4 ++--
hw/pci-bridge/i82801b11.c | 2 +-
hw/pci-bridge/pci_bridge_dev.c | 4 ++--
hw/pci-bridge/pcie_pci_bridge.c | 4 ++--
hw/pci-bridge/pcie_root_port.c | 4 ++--
hw/pci-bridge/simba.c | 2 +-
hw/pci-bridge/xio3130_downstream.c | 4 ++--
hw/pci-bridge/xio3130_upstream.c | 4 ++--
hw/pci-host/designware.c | 2 +-
hw/pci-host/xilinx-pcie.c | 2 +-
hw/pci/pci_bridge.c | 2 +-
13 files changed, 20 insertions(+), 20 deletions(-)
diff --git a/include/hw/pci/pci_bridge.h b/include/hw/pci/pci_bridge.h
index a055fd8d321..b693470a4ea 100644
--- a/include/hw/pci/pci_bridge.h
+++ b/include/hw/pci/pci_bridge.h
@@ -138,7 +138,7 @@ void pci_bridge_disable_base_limit(PCIDevice *dev);
void pci_bridge_reset(DeviceState *qdev);
void pci_bridge_initfn(PCIDevice *pci_dev, const char *typename);
-void pci_bridge_exitfn(PCIDevice *pci_dev);
+void pci_bridge_unrealize(PCIDevice *pci_dev);
void pci_bridge_dev_plug_cb(HotplugHandler *hotplug_dev, DeviceState *dev,
Error **errp);
diff --git a/hw/pci-bridge/cxl_downstream.c b/hw/pci-bridge/cxl_downstream.c
index 1065245a8b8..9431fc3864c 100644
--- a/hw/pci-bridge/cxl_downstream.c
+++ b/hw/pci-bridge/cxl_downstream.c
@@ -198,7 +198,7 @@ static void cxl_dsp_realize(PCIDevice *d, Error **errp)
err_msi:
msi_uninit(d);
err_bridge:
- pci_bridge_exitfn(d);
+ pci_bridge_unrealize(d);
}
static void cxl_dsp_exitfn(PCIDevice *d)
@@ -209,7 +209,7 @@ static void cxl_dsp_exitfn(PCIDevice *d)
pcie_chassis_del_slot(s);
pcie_cap_exit(d);
msi_uninit(d);
- pci_bridge_exitfn(d);
+ pci_bridge_unrealize(d);
}
static const Property cxl_dsp_props[] = {
diff --git a/hw/pci-bridge/cxl_upstream.c b/hw/pci-bridge/cxl_upstream.c
index 208e0c6172e..f9c26c72bae 100644
--- a/hw/pci-bridge/cxl_upstream.c
+++ b/hw/pci-bridge/cxl_upstream.c
@@ -351,7 +351,7 @@ err_cap:
err_msi:
msi_uninit(d);
err_bridge:
- pci_bridge_exitfn(d);
+ pci_bridge_unrealize(d);
}
static void cxl_usp_exitfn(PCIDevice *d)
@@ -359,7 +359,7 @@ static void cxl_usp_exitfn(PCIDevice *d)
pcie_aer_exit(d);
pcie_cap_exit(d);
msi_uninit(d);
- pci_bridge_exitfn(d);
+ pci_bridge_unrealize(d);
}
static const Property cxl_upstream_props[] = {
diff --git a/hw/pci-bridge/i82801b11.c b/hw/pci-bridge/i82801b11.c
index 1d73c14c1f8..028e82e1ac0 100644
--- a/hw/pci-bridge/i82801b11.c
+++ b/hw/pci-bridge/i82801b11.c
@@ -75,7 +75,7 @@ static void i82801b11_bridge_realize(PCIDevice *d, Error
**errp)
return;
err_bridge:
- pci_bridge_exitfn(d);
+ pci_bridge_unrealize(d);
}
static const VMStateDescription i82801b11_bridge_dev_vmstate = {
diff --git a/hw/pci-bridge/pci_bridge_dev.c b/hw/pci-bridge/pci_bridge_dev.c
index b328e50ab31..7446b8a0474 100644
--- a/hw/pci-bridge/pci_bridge_dev.c
+++ b/hw/pci-bridge/pci_bridge_dev.c
@@ -122,7 +122,7 @@ slotid_error:
shpc_cleanup(dev, &bridge_dev->bar);
}
shpc_error:
- pci_bridge_exitfn(dev);
+ pci_bridge_unrealize(dev);
}
static void pci_bridge_dev_exitfn(PCIDevice *dev)
@@ -137,7 +137,7 @@ static void pci_bridge_dev_exitfn(PCIDevice *dev)
if (shpc_present(dev)) {
shpc_cleanup(dev, &bridge_dev->bar);
}
- pci_bridge_exitfn(dev);
+ pci_bridge_unrealize(dev);
}
static void pci_bridge_dev_instance_finalize(Object *obj)
diff --git a/hw/pci-bridge/pcie_pci_bridge.c b/hw/pci-bridge/pcie_pci_bridge.c
index fce292a519b..2c6d58292dd 100644
--- a/hw/pci-bridge/pcie_pci_bridge.c
+++ b/hw/pci-bridge/pcie_pci_bridge.c
@@ -92,7 +92,7 @@ pm_error:
cap_error:
shpc_cleanup(d, &pcie_br->shpc_bar);
error:
- pci_bridge_exitfn(d);
+ pci_bridge_unrealize(d);
}
static void pcie_pci_bridge_exit(PCIDevice *d)
@@ -100,7 +100,7 @@ static void pcie_pci_bridge_exit(PCIDevice *d)
PCIEPCIBridge *bridge_dev = PCIE_PCI_BRIDGE_DEV(d);
pcie_cap_exit(d);
shpc_cleanup(d, &bridge_dev->shpc_bar);
- pci_bridge_exitfn(d);
+ pci_bridge_unrealize(d);
}
static void pcie_pci_bridge_reset(DeviceState *qdev)
diff --git a/hw/pci-bridge/pcie_root_port.c b/hw/pci-bridge/pcie_root_port.c
index 22c2fdb71e7..123c5e2c6e0 100644
--- a/hw/pci-bridge/pcie_root_port.c
+++ b/hw/pci-bridge/pcie_root_port.c
@@ -131,7 +131,7 @@ err_int:
rpc->interrupts_uninit(d);
}
err_bridge:
- pci_bridge_exitfn(d);
+ pci_bridge_unrealize(d);
}
static void rp_exit(PCIDevice *d)
@@ -145,7 +145,7 @@ static void rp_exit(PCIDevice *d)
if (rpc->interrupts_uninit) {
rpc->interrupts_uninit(d);
}
- pci_bridge_exitfn(d);
+ pci_bridge_unrealize(d);
}
static const Property rp_props[] = {
diff --git a/hw/pci-bridge/simba.c b/hw/pci-bridge/simba.c
index bbae594e119..ff7768152cf 100644
--- a/hw/pci-bridge/simba.c
+++ b/hw/pci-bridge/simba.c
@@ -72,7 +72,7 @@ static void simba_pci_bridge_class_init(ObjectClass *klass,
const void *data)
PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
k->realize = simba_pci_bridge_realize;
- k->exit = pci_bridge_exitfn;
+ k->exit = pci_bridge_unrealize;
k->vendor_id = PCI_VENDOR_ID_SUN;
k->device_id = PCI_DEVICE_ID_SUN_SIMBA;
k->revision = 0x11;
diff --git a/hw/pci-bridge/xio3130_downstream.c
b/hw/pci-bridge/xio3130_downstream.c
index dc7d1aa7d77..1f48747bffa 100644
--- a/hw/pci-bridge/xio3130_downstream.c
+++ b/hw/pci-bridge/xio3130_downstream.c
@@ -120,7 +120,7 @@ err_pcie_cap:
err_msi:
msi_uninit(d);
err_bridge:
- pci_bridge_exitfn(d);
+ pci_bridge_unrealize(d);
}
static void xio3130_downstream_exitfn(PCIDevice *d)
@@ -131,7 +131,7 @@ static void xio3130_downstream_exitfn(PCIDevice *d)
pcie_chassis_del_slot(s);
pcie_cap_exit(d);
msi_uninit(d);
- pci_bridge_exitfn(d);
+ pci_bridge_unrealize(d);
}
static const Property xio3130_downstream_props[] = {
diff --git a/hw/pci-bridge/xio3130_upstream.c b/hw/pci-bridge/xio3130_upstream.c
index 40057b749bf..1945d90800f 100644
--- a/hw/pci-bridge/xio3130_upstream.c
+++ b/hw/pci-bridge/xio3130_upstream.c
@@ -99,7 +99,7 @@ err:
err_msi:
msi_uninit(d);
err_bridge:
- pci_bridge_exitfn(d);
+ pci_bridge_unrealize(d);
}
static void xio3130_upstream_exitfn(PCIDevice *d)
@@ -107,7 +107,7 @@ static void xio3130_upstream_exitfn(PCIDevice *d)
pcie_aer_exit(d);
pcie_cap_exit(d);
msi_uninit(d);
- pci_bridge_exitfn(d);
+ pci_bridge_unrealize(d);
}
static const VMStateDescription vmstate_xio3130_upstream = {
diff --git a/hw/pci-host/designware.c b/hw/pci-host/designware.c
index f6e49ce9b8d..ca38d8a76d8 100644
--- a/hw/pci-host/designware.c
+++ b/hw/pci-host/designware.c
@@ -599,7 +599,7 @@ static void designware_pcie_root_class_init(ObjectClass
*klass,
k->device_id = 0xABCD;
k->revision = 0;
k->class_id = PCI_CLASS_BRIDGE_PCI;
- k->exit = pci_bridge_exitfn;
+ k->exit = pci_bridge_unrealize;
k->realize = designware_pcie_root_realize;
k->config_read = designware_pcie_root_config_read;
k->config_write = designware_pcie_root_config_write;
diff --git a/hw/pci-host/xilinx-pcie.c b/hw/pci-host/xilinx-pcie.c
index c71492de9e7..06c5bbef515 100644
--- a/hw/pci-host/xilinx-pcie.c
+++ b/hw/pci-host/xilinx-pcie.c
@@ -298,7 +298,7 @@ static void xilinx_pcie_root_class_init(ObjectClass *klass,
const void *data)
k->revision = 0;
k->class_id = PCI_CLASS_BRIDGE_HOST;
k->realize = xilinx_pcie_root_realize;
- k->exit = pci_bridge_exitfn;
+ k->exit = pci_bridge_unrealize;
device_class_set_legacy_reset(dc, pci_bridge_reset);
k->config_read = xilinx_pcie_root_config_read;
k->config_write = xilinx_pcie_root_config_write;
diff --git a/hw/pci/pci_bridge.c b/hw/pci/pci_bridge.c
index 76255c4cd89..6daf84b2038 100644
--- a/hw/pci/pci_bridge.c
+++ b/hw/pci/pci_bridge.c
@@ -397,7 +397,7 @@ void pci_bridge_initfn(PCIDevice *dev, const char *typename)
}
/* default qdev clean up function for PCI-to-PCI bridge */
-void pci_bridge_exitfn(PCIDevice *pci_dev)
+void pci_bridge_unrealize(PCIDevice *pci_dev)
{
PCIBridge *s = PCI_BRIDGE(pci_dev);
assert(QLIST_EMPTY(&s->sec_bus.child));
--
2.51.0
