From: Nicolin Chen <[email protected]> Tegra241 CMDQV assigns each VINTF a 128KB MMIO region split into two 64 KB pages: - Page0: guest accessible control/status registers for all VCMDQs - Page1: configuration registers (queue GPA/size) that must be trapped by the VMM and translated before programming the HW queue.
This patch implements the Page0 handling in QEMU. Using the vintf offset returned by IOMMUFD during VIOMMU allocation, QEMU maps Page0 into guest physical address space and exposes it via two guest MMIO windows: - 0x10000 :VCMDQ register - 0x30000 :VINTF register The mapping is lazily initialized on first read/write. Signed-off-by: Nicolin Chen <[email protected]> Signed-off-by: Shameer Kolothum <[email protected]> --- hw/arm/tegra241-cmdqv.c | 60 +++++++++++++++++++++++++++++++++++++++++ hw/arm/tegra241-cmdqv.h | 5 ++++ 2 files changed, 65 insertions(+) diff --git a/hw/arm/tegra241-cmdqv.c b/hw/arm/tegra241-cmdqv.c index 899325877e..d8858322dc 100644 --- a/hw/arm/tegra241-cmdqv.c +++ b/hw/arm/tegra241-cmdqv.c @@ -13,14 +13,74 @@ #include "smmuv3-accel.h" #include "tegra241-cmdqv.h" +static bool tegra241_cmdqv_init_vcmdq_page0(Tegra241CMDQV *cmdqv, Error **errp) +{ + SMMUv3State *smmu = cmdqv->smmu; + SMMUv3AccelState *s_accel = smmu->s_accel; + IOMMUFDViommu *viommu; + char *name; + + if (!s_accel) { + return true; + } + + viommu = &s_accel->viommu; + if (!iommufd_backend_viommu_mmap(viommu->iommufd, viommu->viommu_id, + VCMDQ_REG_PAGE_SIZE, + cmdqv->cmdqv_data.out_vintf_mmap_offset, + &cmdqv->vcmdq_page0, errp)) { + cmdqv->vcmdq_page0 = NULL; + return false; + } + + name = g_strdup_printf("%s vcmdq", memory_region_name(&cmdqv->mmio_cmdqv)); + memory_region_init_ram_device_ptr(&cmdqv->mmio_vcmdq_page, + memory_region_owner(&cmdqv->mmio_cmdqv), + name, 0x10000, cmdqv->vcmdq_page0); + memory_region_add_subregion_overlap(&cmdqv->mmio_cmdqv, 0x10000, + &cmdqv->mmio_vcmdq_page, 1); + g_free(name); + + name = g_strdup_printf("%s vintf", memory_region_name(&cmdqv->mmio_cmdqv)); + memory_region_init_ram_device_ptr(&cmdqv->mmio_vintf_page, + memory_region_owner(&cmdqv->mmio_cmdqv), + name, 0x10000, cmdqv->vcmdq_page0); + memory_region_add_subregion_overlap(&cmdqv->mmio_cmdqv, 0x30000, + &cmdqv->mmio_vintf_page, 1); + g_free(name); + + return true; +} + static uint64_t tegra241_cmdqv_read(void *opaque, hwaddr offset, unsigned size) { + Tegra241CMDQV *cmdqv = (Tegra241CMDQV *)opaque; + Error *local_err = NULL; + + if (!cmdqv->vcmdq_page0) { + tegra241_cmdqv_init_vcmdq_page0(cmdqv, &local_err); + if (local_err) { + error_report_err(local_err); + local_err = NULL; + } + } + return 0; } static void tegra241_cmdqv_write(void *opaque, hwaddr offset, uint64_t value, unsigned size) { + Tegra241CMDQV *cmdqv = (Tegra241CMDQV *)opaque; + Error *local_err = NULL; + + if (!cmdqv->vcmdq_page0) { + tegra241_cmdqv_init_vcmdq_page0(cmdqv, &local_err); + if (local_err) { + error_report_err(local_err); + local_err = NULL; + } + } } static const MemoryRegionOps mmio_cmdqv_ops = { diff --git a/hw/arm/tegra241-cmdqv.h b/hw/arm/tegra241-cmdqv.h index 9bc72b24d9..ccdf0651be 100644 --- a/hw/arm/tegra241-cmdqv.h +++ b/hw/arm/tegra241-cmdqv.h @@ -19,8 +19,13 @@ typedef struct Tegra241CMDQV { SMMUv3State *smmu; MemoryRegion mmio_cmdqv; qemu_irq irq; + MemoryRegion mmio_vcmdq_page; + MemoryRegion mmio_vintf_page; + void *vcmdq_page0; } Tegra241CMDQV; +#define VCMDQ_REG_PAGE_SIZE 0x10000 + #ifdef CONFIG_TEGRA241_CMDQV bool tegra241_cmdqv_alloc_viommu(SMMUv3State *s, HostIOMMUDeviceIOMMUFD *idev, uint32_t *out_viommu_id, Error **errp); -- 2.43.0
