Allocate a Tegra241 CMDQV type vEVENTQ object so that any host side errors related to the CMDQV can be received and propagated back to the guest.
Event read and propagation will be added in a later patch. Signed-off-by: Shameer Kolothum <[email protected]> --- hw/arm/tegra241-cmdqv.c | 51 +++++++++++++++++++++++++++++++++++++++++ hw/arm/tegra241-cmdqv.h | 1 + 2 files changed, 52 insertions(+) diff --git a/hw/arm/tegra241-cmdqv.c b/hw/arm/tegra241-cmdqv.c index 5e9a980d27..812b027923 100644 --- a/hw/arm/tegra241-cmdqv.c +++ b/hw/arm/tegra241-cmdqv.c @@ -136,6 +136,52 @@ static uint64_t tegra241_cmdqv_read_vcmdq(Tegra241CMDQV *cmdqv, hwaddr offset, return 0; } } + +static void tegra241_cmdqv_free_veventq(Tegra241CMDQV *cmdqv) +{ + SMMUv3State *smmu = cmdqv->smmu; + SMMUv3AccelState *s_accel = smmu->s_accel; + IOMMUFDViommu *viommu = &s_accel->viommu; + IOMMUFDVeventq *veventq = cmdqv->veventq; + + if (!veventq) { + return; + } + + iommufd_backend_free_id(viommu->iommufd, veventq->veventq_id); + g_free(veventq); + cmdqv->veventq = NULL; +} + +static bool tegra241_cmdqv_alloc_veventq(Tegra241CMDQV *cmdqv, Error **errp) +{ + SMMUv3State *smmu = cmdqv->smmu; + SMMUv3AccelState *s_accel = smmu->s_accel; + IOMMUFDViommu *viommu = &s_accel->viommu; + IOMMUFDVeventq *veventq; + uint32_t veventq_id; + uint32_t veventq_fd; + + if (cmdqv->veventq) { + return true; + } + + if (!iommufd_backend_alloc_veventq(viommu->iommufd, viommu->viommu_id, + IOMMU_VEVENTQ_TYPE_TEGRA241_CMDQV, + 1 << 16, &veventq_id, &veventq_fd, + errp)) { + error_append_hint(errp, "Tegra241 CMDQV: failed to alloc veventq"); + return false; + } + + veventq = g_new(IOMMUFDVeventq, 1); + veventq->veventq_id = veventq_id; + veventq->veventq_fd = veventq_fd; + veventq->viommu = viommu; + cmdqv->veventq = veventq; + return true; +} + static uint64_t tegra241_cmdqv_read(void *opaque, hwaddr offset, unsigned size) { Tegra241CMDQV *cmdqv = (Tegra241CMDQV *)opaque; @@ -259,11 +305,16 @@ static bool tegra241_cmdqv_setup_vcmdq(Tegra241CMDQV *cmdqv, int index, g_free(vcmdq); } + if (!tegra241_cmdqv_alloc_veventq(cmdqv, errp)) { + return false; + } + viommu = &s_accel->viommu; if (!iommufd_backend_alloc_hw_queue(viommu->iommufd, viommu->viommu_id, IOMMU_HW_QUEUE_TYPE_TEGRA241_CMDQV, index, addr, size, &hw_queue_id, errp)) { + tegra241_cmdqv_free_veventq(cmdqv); return false; } hw_queue = g_new(IOMMUFDHWqueue, 1); diff --git a/hw/arm/tegra241-cmdqv.h b/hw/arm/tegra241-cmdqv.h index 4972e367f6..ba7f2a0b1b 100644 --- a/hw/arm/tegra241-cmdqv.h +++ b/hw/arm/tegra241-cmdqv.h @@ -24,6 +24,7 @@ typedef struct Tegra241CMDQV { MemoryRegion mmio_vintf_page; void *vcmdq_page0; IOMMUFDHWqueue *vcmdq[128]; + IOMMUFDVeventq *veventq; /* Register Cache */ uint32_t config; -- 2.43.0
