Hi, As far as I know, all the PCIE devices implemented here work with 256 bytes config header.
Cheers, Fabien. 2012/11/20 Jason Baron <jba...@redhat.com>: > On Fri, Nov 16, 2012 at 09:39:07AM +0100, lementec fabien wrote: >> Hi, >> >> I am a software engineer who works in an electronic group. Using QEMU >> to emulate devices allows me to start writing and testing LINUX software >> before the device is actually available. In the group, we are mostly >> working with XILINX FPGAs, communicating with the host via PCIE. The >> devices are implemented in VHDL. > > As you know the current PCI config space is limited to 256 bytes on x86. I was > wondering then, if you needed to work around this limitation in any way > since you've mentioned you're using PCIE (which has a 4k config space)? > > Thanks, > > -Jason >
