On 28 March 2013 15:32, Richard Henderson <r...@twiddle.net> wrote: > We get to re-use the _rIN and _rIK subroutines to handle the various > combinations of add vs sub. Fold the << 21 into the opcode enum values > so that we can explicitly add TO_CPSR as desired. > > Signed-off-by: Richard Henderson <r...@twiddle.net> > --- > tcg/arm/tcg-target.c | 106 > ++++++++++++++++++++++++++++----------------------- > 1 file changed, 58 insertions(+), 48 deletions(-) > > diff --git a/tcg/arm/tcg-target.c b/tcg/arm/tcg-target.c > index 3152798..48cc186 100644 > --- a/tcg/arm/tcg-target.c > +++ b/tcg/arm/tcg-target.c > @@ -302,27 +302,26 @@ static inline int > tcg_target_const_match(tcg_target_long val, > } > } > > +#define TO_CPSR (1 << 20)
This is the S bit; I think it would be helpful if our #define had a name that made that clearer... > + > enum arm_data_opc_e { > - ARITH_AND = 0x0, > - ARITH_EOR = 0x1, > - ARITH_SUB = 0x2, > - ARITH_RSB = 0x3, > - ARITH_ADD = 0x4, > - ARITH_ADC = 0x5, > - ARITH_SBC = 0x6, > - ARITH_RSC = 0x7, > - ARITH_TST = 0x8, > - ARITH_CMP = 0xa, > - ARITH_CMN = 0xb, > - ARITH_ORR = 0xc, > - ARITH_MOV = 0xd, > - ARITH_BIC = 0xe, > - ARITH_MVN = 0xf, > + ARITH_AND = 0x0 << 21, > + ARITH_EOR = 0x1 << 21, > + ARITH_SUB = 0x2 << 21, > + ARITH_RSB = 0x3 << 21, > + ARITH_ADD = 0x4 << 21, > + ARITH_ADC = 0x5 << 21, > + ARITH_SBC = 0x6 << 21, > + ARITH_RSC = 0x7 << 21, > + ARITH_TST = 0x8 << 21 | TO_CPSR, > + ARITH_CMP = 0xa << 21 | TO_CPSR, > + ARITH_CMN = 0xb << 21 | TO_CPSR, > + ARITH_ORR = 0xc << 21, > + ARITH_MOV = 0xd << 21, > + ARITH_BIC = 0xe << 21, > + ARITH_MVN = 0xf << 21, > }; It feels a little ugly to OR in the S bit in this enum, but I guess it works. Maybe we should add ARITH_TEQ at some point? -- PMM