sPAPR PHB emulates IO ports on PCI via a special memory region which
routes all reads/writes further via cpu_in*/cpu_out* which are eventually
processed by MemoryRegionOps implemented by devices.
As devices normally take care of endianness themselves by setting
correct MemoryRegionOps::endianness for their memory regions, it is
better to set endianness in spapr_io_ops to NATIVE.
Tested on sPAPR KVM with e1000, rtl8139, virtio-net.
Signed-off-by: Alexey Kardashevskiy <a...@ozlabs.ru>
---
I would really appreciate if someone told me what exactly changed
in QEMU and broke spapr-pci. It used to work... Thanks!
---
hw/ppc/spapr_pci.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/ppc/spapr_pci.c b/hw/ppc/spapr_pci.c
index ca588aa..dfe4d04 100644
--- a/hw/ppc/spapr_pci.c
+++ b/hw/ppc/spapr_pci.c
@@ -472,7 +472,7 @@ static void spapr_io_write(void *opaque, hwaddr addr,
}
static const MemoryRegionOps spapr_io_ops = {
- .endianness = DEVICE_LITTLE_ENDIAN,
+ .endianness = DEVICE_NATIVE_ENDIAN,
.read = spapr_io_read,
.write = spapr_io_write
};
--
1.8.3.2
