On 2 September 2013 15:13, Marcel Apfelbaum <marce...@redhat.com> wrote:
> Note: The series is incomplete, for review only
>
> PCI spec requires that a transaction that has not been claimed
> by any PCI bus devices will be terminated by the initiator
> with "master abort". For read transactions -1(FFFFFFFF) is returned and
> writes are silently dropped. (already implemented in quemu)

...but only erroneously and by breaking a pile of other boards.

> Note:
> For the moment the code assumes that all the reads/writes on
> pci address space are done by the cpu.

This is a bogus assumption in the presence of bus mastering
PCI devices, which aren't exactly uncommon.

-- PMM

Reply via email to