From: Hervé Poussineau <hpous...@reactos.org>
This check is useless, as bigger addresses will be ignored when
added to 'io' MemoryRegion, which has a size of 64K.
However, some architectures don't use the 'io' MemoryRegion, like
the alpha and versatile platforms. They create a PCI I/O region
bigger than 64K, so let them handle PCI I/O BARs in the higher range.
MST: reinstated work-around for BAR sizing.
Signed-off-by: Hervé Poussineau <hpous...@reactos.org>
Reviewed-by: Richard Henderson <r...@twiddle.net>
Signed-off-by: Michael S. Tsirkin <m...@redhat.com>
---
hw/pci/pci.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/hw/pci/pci.c b/hw/pci/pci.c
index 52cbab7..00554a0 100644
--- a/hw/pci/pci.c
+++ b/hw/pci/pci.c
@@ -1028,8 +1028,10 @@ static pcibus_t pci_bar_address(PCIDevice *d,
}
new_addr = pci_get_long(d->config + bar) & ~(size - 1);
last_addr = new_addr + size - 1;
- /* NOTE: we have only 64K ioports on PC */
- if (last_addr <= new_addr || new_addr == 0 || last_addr > UINT16_MAX) {
+ /* Check if 32 bit BAR wraps around explicitly.
+ * TODO: make priorities correct and remove this work around.
+ */
+ if (last_addr <= new_addr || new_addr == 0 || last_addr >= UINT32_MAX)
{
return PCI_BAR_UNMAPPED;
}
return new_addr;
--
MST
