Il 13/12/2013 20:18, Scott Wood ha scritto: >> Also are you sure flush_icache_range() >> works correctly when multiple threads (multiple vCPUs, >> potentially executing on different host CPUs) are involved? > > On PPC these cache operations broadcast, and are the architecturally > defined way of doing self-modifying code.
I expect that to be the same on any cache-coherent system. On a VIVT cache with shadow paging, some kernel collaboration may be necessary because you have to flush using guest addresses rather than host addresses (or alternatively you have to flush a whole context id). But we can fix the problem when it happens. Paolo
