On Thu, May 8, 2014 at 11:35 AM, Edgar E. Iglesias <[email protected]> wrote: > From: Guenter Roeck <[email protected]> > > The MER register only has two valid bits. This is now used by > the linux kernel to auto-detect endianness, and causes Linux 3.15-rc1 > and later to hang when run under qemu-microblaze. Mask valid bits before > writing the register to solve the problem. > > Signed-off-by: Guenter Roeck <[email protected]> > Reviewed-by: Edgar E. Iglesias <[email protected]> > [Edgar: Untabified] > Signed-off-by: Edgar E. Iglesias <[email protected]>
Reviewed-by: Peter Crosthwaite <[email protected]> > --- > hw/intc/xilinx_intc.c | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/hw/intc/xilinx_intc.c b/hw/intc/xilinx_intc.c > index 1b228ff..c3682f1 100644 > --- a/hw/intc/xilinx_intc.c > +++ b/hw/intc/xilinx_intc.c > @@ -121,6 +121,9 @@ pic_write(void *opaque, hwaddr addr, > case R_CIE: > p->regs[R_IER] &= ~value; /* Atomic clear ie. */ > break; > + case R_MER: > + p->regs[R_MER] = value & 0x3; > + break; We probably should macroify the whole core at some point. Regards, Peter > case R_ISR: > if ((p->regs[R_MER] & 2)) { > break; > -- > 1.8.3.2 > >
