> The normal way to handle this is to end the translation block whenever we > issue > an instruction that could (unpredictably) affect how the TB is translated.
> In the mips translator, this is done via "ctx->bstate = BS_STOP". > There are plenty of examples within gen_mtc0 already. Yes, I am aware of that, but this is not the case for HWrena in the code right now. Is it really cost-effective to force end of translation block in this case? P. ________________________________________ From: Richard Henderson [rth7...@gmail.com] on behalf of Richard Henderson [r...@twiddle.net] Sent: Tuesday, May 27, 2014 7:20 PM To: Petar Jovanovic; Petar Jovanovic; qemu-devel@nongnu.org Cc: aurel...@aurel32.net; James Hogan Subject: Re: [v2 PATCH] target-mips: implement UserLocal Register On 05/27/2014 09:46 AM, Petar Jovanovic wrote: > Can you please add more thoughts on this? Within the same translation block, > we can have an instruction that alters HWrena (mtc0) and rdwhr instruction > that > will behave differently based on content of HWrena. The normal way to handle this is to end the translation block whenever we issue an instruction that could (unpredictably) affect how the TB is translated. In the mips translator, this is done via "ctx->bstate = BS_STOP". There are plenty of examples within gen_mtc0 already. r~
