On Tue, Sep 09, 2014 at 08:16:47PM +0100, Peter Maydell wrote: > On 18 August 2014 10:40, Edgar E. Iglesias <edgar.igles...@gmail.com> wrote: > > From: "Edgar E. Iglesias" <edgar.igles...@xilinx.com> > > > > Hi, > > > > This is a second round of AArch64 EL2/3 patches working on the exception > > model. Among other things adding HVC/SMC, interrupt routing to EL2/3 and > > Virtual IRQs/FIQs. The VIRQ/VFIQ support only adds the external signal > > delivery method. > > > > Patch 8 fails checkpatch, seems like a bug in checkpatch, CC:d Blue. > > > > This conflicts slightly with the PSCI emulation patches that Rob posted. > > A rebase should be trivial, hooking in the PSCI emulation calls in the > > HVC/SMC helpers. > > Ping? I was expecting to see a v6 of this...
Hi, Yes, it's just been busy times on my side. I will send a v6 out this week. What I was planning todo: 1. Another shot at the RES0/1 2. Rebase the SMC/HVC code with the single step implementation in upstream. 3. Add virtual IRQ/FIQs to the list of events that signal that a CPU has work todo. If you have any further comments on the patches that still lack Reviewed-By, it would be great to get them soon. Maybe we can avoid some of the slow round-trips. Cheers, Edgar
