On 6 November 2014 15:50, Greg Bellows <greg.bell...@linaro.org> wrote:
> From: Fabian Aggeler <aggel...@ethz.ch>
>
> Prepare for cp register banking by inserting every cp register twice,
> once for secure world and once for non-secure world.
>
> Signed-off-by: Fabian Aggeler <aggel...@ethz.ch>
> Signed-off-by: Greg Bellows <greg.bell...@linaro.org>
> + if (state == ARM_CP_STATE_AA32) {
> + /* Under AArch32 CP registers can be common
> + * (same for secure and non-secure world) or banked.
> + */
> + switch (r->secure) {
> + case ARM_CP_SECSTATE_S:
> + case ARM_CP_SECSTATE_NS:
> + add_cpreg_to_hashtable(cpu, r, opaque, state,
> + r->secure, crm, opc1,
> opc2);
> + break;
Looks like you might have some 3-space indent going on here?
Otherwise
Reviewed-by: Peter Maydell <peter.mayd...@linaro.org>
thanks
-- PMM
