Peter Maydell writes: > On 20 March 2016 at 18:09, Lluís Vilanova <vilan...@ac.upc.edu> wrote: >> Oh! Yes, I seem to remember that code path now, I checked it a >> really long time ago. I was assuming that whenever this event is >> enabled at compile time, I would have to modify QEMU's TLB to store >> the guest physical address (then used by the tracing event).
> I guess we could maybe put that into the iotlb. You definitely > don't want it in the CPUTLBEntry struct as that one is space > critical for performance. (If you're really lucky you can > reconstruct the physaddr from the iotlb addr field but I suspect > you can't.) > Once you've decided to take the hit of keeping the paddr in the > TLB it's probably faster to just unconditionally store it rather > than doing a "store if trace event X enabled" test. I meant to make the check at compile time, since we have defines to check which events are enabled/disabled in trace-events. > PS: you probably also want to be able to trace the MemTxAttrs > (which tells you whether you have an S or NS access on ARM, > among other things). I'll keep these in mind for a separate series with extended memory info. Thanks, Lluis
