On Thu, Sep 29, 2016 at 4:59 PM, Peter Maydell <peter.mayd...@linaro.org> wrote:
> On 24 September 2016 at 12:20, Alistair Francis <alistai...@gmail.com> wrote:
>> Connect the ADC devices to the STM32F205 SoC.
>>
>> Signed-off-by: Alistair Francis <alist...@alistair23.me>
>> ---
>>
>> #define FLASH_BASE_ADDRESS 0x08000000
>> #define FLASH_SIZE (1024 * 1024)
>> @@ -52,6 +55,9 @@ typedef struct STM32F205State {
>> STM32F2XXSyscfgState syscfg;
>> STM32F2XXUsartState usart[STM_NUM_USARTS];
>> STM32F2XXTimerState timer[STM_NUM_TIMERS];
>> + STM32F2XXADCState adc[STM_NUM_ADCS];
>> +
>> + qemu_or_irq *adc_irqs;
>
> Seems mildly inconsistent that all the other devices
> "owned" by this SoC are embedded in the struct but this
> one is a pointer (and so initialized via object_new()
> rather than object_initialized()).
>
> That's not a big deal though, so I've applied this
> series to target-arm.next; you can change the above
> in a followup patch, or not, as you choose.
Good point, I didn't really think of it like that.
I don't mind it this way, hopefully I will set up another patch series
and I'll update it then if need be.
Thanks,
Alistair
>
>> } STM32F205State;
>>
>> #endif
>> --
>> 2.7.4
>
> thanks
> -- PMM
