On Fri, Oct 14, 2016 at 06:20:31PM -0300, Eduardo Habkost wrote:
> I have been wondering: should we allow live migration with the
> invtsc flag enabled, if TSC scaling is available on the
TSC scaling and invtsc flag, yes.
> For reference, this is what the Intel SDM says about invtsc:
> The time stamp counter in newer processors may support an
> enhancement, referred to as invariant TSC. Processor’s support
> for invariant TSC is indicated by CPUID.80000007H:EDX.
> The invariant TSC will run at a constant rate in all ACPI P-,
> C-. and T-states. This is the architectural behavior moving
> forward. On processors with invariant TSC support, the OS may
> use the TSC for wall clock timer services (instead of ACPI or
> HPET timers). TSC reads are much more efficient and do not
> incur the overhead associated with a ring transition or access
> to a platform resource.
Yes. The blockage happened for different reasons:
1) Migration: to host with different TSC frequency.
2) Savevm: It is not safe to use the TSC for wall clock timer
By allowing savevm, you make a commitment to allow a feature
at the expense of not complying with the spec (specifically the "
the OS may use the TSC for wall clock timer services", because the
TSC stops relative to realtime for the duration of the savevm stop
But since Linux guests use kvmclock and Windows guests use Hyper-V
enlightenment, it should be fine to disable 2).
There is a bug open for this, btw: