On 10/17/16 14:07, Gerd Hoffmann wrote:
>   Hi,
>> {26} Another remark (important to me) in this section: the document
>> doesn't state firmware expectations. It's clear the firmware is expected
>> to reserve no IO space for PCI Express Downstream Ports and Root Ports,
>> but what about MMIO?
>> We discussed this at length with Alex, but I think we didn't conclude
>> anything. It would be nice if firmware received some instructions from
>> this document in this regard, even before we implement our own ports and
>> bridges in QEMU.
> Where do we stand in terms of generic pcie ports btw?

"planning phase", AFAIR

> I think the plan is still to communicate suggestions to the firmware via
> pci config space, either by using reset defaults of the limit register,
> or of that doesn't work due to initialization order issues using some
> vendor specific pcie capability.
> As long as we don't have that there is nothing do document, other than
> maybe briefly mentioning the plans we have and documenting the current
> state (2M mmio in seabios, and I think the same for ovmf).
> The patches adding the generic ports can also update the documentation
> of course.
>> <digression>
>> If we think such recommendations are out of scope at this point, *and*
>> noone disagrees strongly (Gerd?), then I could add some experimental
>> fw_cfg knobs to OVMF for this, such as (units in MB):
> Why?  Given that the virtio mmio bar size issue is solved I don't see a
> strong reason to hurry with this.  Just wait until the generic ports are
> there.


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