W dniu 09.01.2017 o 17:24, Cédric Le Goater pisze:
Instead, we can simply set the irq level when unselecting the slave devices. This change prepares ground for a subsequent cleanup of the aspeed_smc_update_cs() routine which uselessly loops on all slaves to update their status.Signed-off-by: Cédric Le Goater <c...@kaod.org> --- hw/ssi/aspeed_smc.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/hw/ssi/aspeed_smc.c b/hw/ssi/aspeed_smc.c index 8a7217d4df6c..205c0abfae98 100644 --- a/hw/ssi/aspeed_smc.c +++ b/hw/ssi/aspeed_smc.c @@ -424,6 +424,7 @@ static void aspeed_smc_reset(DeviceState *d) /* Unselect all slaves */ for (i = 0; i < s->num_cs; ++i) { s->regs[s->r_ctrl0 + i] |= CTRL_CE_STOP_ACTIVE; + qemu_set_irq(s->cs_lines[i], true);
Does SMC support only flash chips with CS active LOW? If yes: Acked-by: Marcin Krzemiński <mar.krzemin...@gmail.com>
}/* setup default segment register values for all */@@ -431,8 +432,6 @@ static void aspeed_smc_reset(DeviceState *d) s->regs[R_SEG_ADDR0 + i] = aspeed_smc_segment_to_reg(&s->ctrl->segments[i]); } - - aspeed_smc_update_cs(s); }static uint64_t aspeed_smc_read(void *opaque, hwaddr addr, unsigned int size)
