When rounding a floating point result to float64 precision, the
existing code doesn't re-calculate the required round increment
for the underflow case. Fix this.
Signed-off-by: Bharata B Rao <bhar...@linux.vnet.ibm.com>
---
fpu/softfloat.c | 17 +++++++++++++++++
1 file changed, 17 insertions(+)
diff --git a/fpu/softfloat.c b/fpu/softfloat.c
index c295f31..b04699c 100644
--- a/fpu/softfloat.c
+++ b/fpu/softfloat.c
@@ -651,6 +651,23 @@ static float64 roundAndPackFloat64(flag zSign, int zExp,
uint64_t zSig,
if (isTiny && roundBits) {
float_raise(float_flag_underflow, status);
}
+ switch (roundingMode) {
+ case float_round_nearest_even:
+ case float_round_ties_away:
+ roundIncrement = 0x200;
+ break;
+ case float_round_to_zero:
+ roundIncrement = 0;
+ break;
+ case float_round_up:
+ roundIncrement = zSign ? 0 : 0x3ff;
+ break;
+ case float_round_down:
+ roundIncrement = zSign ? 0x3ff : 0;
+ break;
+ default:
+ abort();
+ }
}
}
if (roundBits) {
--
2.7.4
