Alex Bennée writes: > Lluís Vilanova <vilan...@ac.upc.edu> writes:
>> This series proposes a generic (target-agnostic) instruction translation >> framework. >> >> It basically provides a generic main loop for instruction disassembly, which >> calls target-specific functions when necessary. This generalization makes >> inserting new code in the main loop easier, and helps in keeping all targets >> in >> synch as to the contents of it. > As has been mentioned elsewhere I think we need to spend a little time > making sure we have well defined common semantics for the as many of the > translation exit conditions as possible so the others really are just > special conditions for each architecture. >> This series also paves the way towards adding events to trace guest code >> execution (BBLs and instructions). > I'm looking forward to it, it is certainly going in the right direction > and will make instrumentation a lot easier ;-) >> I've ported i386/x86-64 and arm/aarch64 as an example to see how it fits in >> the >> current organization, but will port the rest when this series gets >> merged. > Are you confident the other architectures will be as amenable to this > port? I guess we want to avoid being in a position of having a partial > port in progress for too long. > Anyway I'm done with my review pass for now, I look forward to future > revisions ;-) I've only skimmed through a few other targets, but there seems to be a pattern that follows the same type of changes. In fact, most of them are just moving code around into refactored hooks. But I don't want these to be my "last famous words" :) Thanks, Lluis
