On 14 September 2017 at 19:35, Richard Henderson
<richard.hender...@linaro.org> wrote:
>
> + /* ??? Capstone requires that we copy the data into a host-addressable
> + buffer first and has no call-back to read more. Therefore we need
> + an estimate of buffer size. This will work for most RISC, but we'll
> + need to figure out something else for variable-length ISAs. */
> + if (s.info.cap_arch >= 0 && cap_disas(&s.info, pc, 4 * nb_insn)) {
> + return;
> + }
Can we do something with gradually adding more to our host buffer
until capstone says it's managed to disassemble the right number
of instructions?
thanks
-- PMM
