On 04/17/2018 12:38 PM, Emilio G. Cota wrote: > On Tue, Apr 17, 2018 at 22:45:51 +0100, Peter Maydell wrote: >> On 17 April 2018 at 22:27, Emilio G. Cota <c...@braap.org> wrote: >>> BTW I just checked with -t host on an IBM Power8, and we get >>> the same 1049 flag errors we get with -t soft plus two additional ones: >>> >>> +A 0xffb00000, expected: 0x7fa00000, returned: 0x7fa00000, \ >>> expected exceptions: i, returned: none >>> +error: flags mismatch for input @ ibm/Basic-Types-Inputs.fptest:382: >>> +b32A =0 S -> S i >> >> That's Abs of an SNaN; the test expects Invalid, which is wrong, >> because IEEE754 says absolute-value is a "quiet-computational >> operation" that never signals an exception. >> >> What's odd is that we don't report that error for the softfloat >> implementation! I also don't understand why the expected value >> isn't just the input value with the sign bit flipped. > > With -t soft we don't handle "abs" and we don't get the error -- we get > a "not handled" instead. > Is there a function that we could use for abs? The only ones I've seen > are floatX_abs() which mask out the sign bit and do nothing else.
Both abs and neg are pure bit operations. So, yes, floatX_abs (and floatX_chs) are the softfloat functions for these. And if fp-test thinks Invalid should be raised, it's wrong. >>> (...) >>> +cff 0xffb00000, expected: 0x7ff8000000000000, returned: >>> 0x7ff4000000000000, \ >>> expected exceptions: i, returned: none >>> +error: flags mismatch for input @ ibm/Basic-Types-Inputs.fptest:26170: >>> +b32b64cff =0 S -> Q i >> >> SNaN conversion from 32 bit to 64 bit. Here I agree >> with the test -- we should quieten the NaN and raise >> Invalid -- which implies that the hardware is wrong ?!? > > This passes on an Intel host, and fails on both Power7 and 8 hosts I have > access to. I don't have the Power ISA spec in front of me, but I hope > there's something about this specified in it. IIRC this is unspecified and does vary by implementation. r~
