On Fri, Apr 27, 2018 at 12:14 PM, Richard Henderson <
richard.hender...@linaro.org> wrote:
> On 04/25/2018 01:45 PM, Michael Clark wrote:
> > + uint32_t old, new;
> > + do {
> > + old = atomic_read(&plic->pending[word]);
> > + new = (old & ~(1 << (irq & 31))) | (-!!pending & (1 << (irq &
> 31)));
> > + } while (atomic_cmpxchg(&plic->pending[word], old, new) != old);
>
> I prefer
>
> uint32_t old, new, cmp = atomic_read(...);
> do {
> old = cmp;
> new = ...;
> cmp = atomic_cmpxchg(...);
> } while (old != cmp);
>
> to avoid an extra load, should we loop.
>
Thanks. I've revised the code to use this convention.
I've also done so in "Implement atomic mip/sip CSR updates" which has the
same pattern.
That said, what you have is not wrong. So,
> Reviewed-by: Richard Henderson <richard.hender...@linaro.org>
>
>
> r~
>
