On Thu, Jul 12, 2018 at 12:12:17PM +0200, Steffen Görtz wrote: > Add some non-volatile memories and a non-volatile > memory controller for the nRF51. > Furthermore, a testsuite for the bbc:microbit and > nrf51 soc was added. > > Examination of the real device showed that > NVMs remained unchanged when the write/erase enabled > bits are not set in the controller, so we can > safely ignore all writes. > More: > https://github.com/douzepouze/gsoc18-qemu/blob/master/notes.md#test-nvmc-behavior-out-of-micropython-repl > > The CODE/FLASH NVM is not currently included in this > peripheral. It is hosted in the SOC and must be read-only > to provide an accurate model. > > Steffen Görtz (2): > arm: Add NRF51 SOC non-volatile memory controller > tests: Add bbc:microbit / nRF51 test suite
Please include a changelog in the cover letter so that it's clear what has changed in this revision.
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