Hi Philippe,
> --- a/target/mips/translate.c
> +++ b/target/mips/translate.c
> @@ -3843,6 +3843,46 @@ static void gen_mul_txx9(DisasContext *ctx, uint32_t
> opc,
What about documenting MADD and MADDU along with MULT and MULTU in the
note above?
> + case OPC_MADD:
This case is unreachable, because gen_mul_txx9 will never be called for
OPC_MADD.
> + TCGv_i64 t2 = tcg_temp_new_i64();
> + TCGv_i64 t3 = tcg_temp_new_i64();
The MADD (and MADDU) instructions are defined to multiply 32-bit integers
in the C790 manual. Are 64-bit integers required to perform this with QEMU?
> + gen_move_low32(cpu_LO[acc], t2);
> + gen_move_high32(cpu_HI[acc], t2);
> + if (rd) {
> + gen_move_low32(cpu_gpr[rd], t2);
Are LO, HI and GPR[rd] sign-extended to 64 bits when required?
> + case OPC_MADDU:
As above, this case is unreachable, because gen_mul_txx9 will never be
called for OPC_MADDU.
> + gen_move_low32(cpu_LO[acc], t2);
> + gen_move_high32(cpu_HI[acc], t2);
> + if (rd) {
> + gen_move_low32(cpu_gpr[rd], t2);
As above, are LO, HI and GPR[rd] sign-extended to 64 bits when required?
Fredrik
